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The Definitive Guide to ARM® Cortex®-M3 and Cortex®-M4 Processors, 3rd Edition
book

The Definitive Guide to ARM® Cortex®-M3 and Cortex®-M4 Processors, 3rd Edition

by Joseph Yiu
October 2013
Intermediate to advanced content levelIntermediate to advanced
864 pages
23h 12m
English
Newnes
Content preview from The Definitive Guide to ARM® Cortex®-M3 and Cortex®-M4 Processors, 3rd Edition
Chapter 7

Exceptions and Interrupts

Abstract

This chapter focus on exceptions and interrupt handling. The topics covered included Nested Vectored Interrupt Controller (NVIC), exception types (including interrupts), priority levels, vector table, interrupt handling behaviors, interrupt handling sequences, interrupt management using CMSIS-Core APIs and the programmer's model of the NVIC.

Keywords

exception; interrupts; priority; vector table; exception entrance; exception return; NVIC; System Control Block (SCB); interrupt masking; pending status

Chapter Outline

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Publisher Resources

ISBN: 9780124080829