Wafer Manufacturing

7Lapping

7.1 Introduction

After wafers are sliced from crystal ingots, individual as‐sliced wafers have tool marks on the surface, as well as subsurface cracks and damage beneath the surface. The next steps in wafer surface processing involves the removal of tool marks and the flattening of the wafer surface. Figure 7.1 illustrates the “polishing” processes that include lapping, etching, pre‐polishing, and polishing to produce polished wafers, ready for microelectronic fabrication. The focus of this chapter is the “lapping” process.

Typical processes to flatten wafer surfaces include grinding or lapping. The processes can also be broken into single‐sided or double‐sided operation. The determining factors in adopting lapping or grinding, or both, are (i) wafer size, (ii) wafer material, and (iii) type of device to be fabricated. The lapping process is the most economical way to perform thinning or flattening of silicon wafers of size 200 mm or smaller. Lapping is a step to achieve a high degree of flatness of wafers, and to reduce the depth of subsurface damage, and radial and lateral cracks formed during the slicing process. Since lapping is also a mechanical process with free abrasive machining, new cracks and damage beneath the surface will be generated, although with a shallower depth than those produced by more brutal slicing processes. Wafers produced by industrial processes typically are lapped on both sides.

The main objectives of lapping are to obtain a high level of ...