book

Advanced Signal Integrity For High-Speed Digital Designs

March 2009

Intermediate to advanced

680 pages

18h 13m

English

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1.1 Computing Power: Past and Future1.2 The Problem1.3 THE BASICS1.4 A NEW REALM OF BUS DESIGN1.5 SCOPE OF THE BOOK1.6 SUMMARYREFERENCES
2.1 MAXWELL'S EQUATIONS2.2 COMMON VECTOR OPERATORS2.3 WAVE PROPAGATION2.4 ELECTROSTATICS2.5 MAGNETOSTATICS2.6 POWER FLOW AND THE POYNTING VECTOR2.7 REFLECTIONS OF ELECTROMAGNETIC WAVESREFERENCESPROBLEMS
3.1 TRANSMISSION-LINE STRUCTURES3.2 WAVE PROPAGATION ON LOSS-FREE TRANSMISSION LINES3.3 TRANSMISSION-LINE PROPERTIES3.4 TRANSMISSION-LINE PARAMETERS FOR THE LOSS-FREE CASE3.5 TRANSMISSION-LINE REFLECTIONS3.6 TIME-DOMAIN REFLECTOMETRYREFERENCESPROBLEMS
4.1 MUTUAL INDUCTANCE AND CAPACITANCE4.2 COUPLED WAVE EQUATIONS4.3 COUPLED LINE ANALYSIS4.4 MODAL ANALYSIS4.5 CROSSTALK MINIMIZATION4.6 SUMMARYREFERENCESPROBLEMS
5.1 SIGNALS PROPAGATING IN UNBOUNDED CONDUCTIVE MEDIA5.2 CLASSIC CONDUCTOR MODEL FOR TRANSMISSION LINES5.3 SURFACE ROUGHNESS5.4 TRANSMISSION-LINE PARAMETERS FOR NONIDEAL CONDUCTORSREFERENCESPROBLEMS
6.1 POLARIZATION OF DIELECTRICS6.2 CLASSIFICATION OF DIELECTRIC MATERIALS6.3 FREQUENCY-DEPENDENT DIELECTRIC BEHAVIOR6.4 PROPERTIES OF A PHYSICAL DIELECTRIC MODEL6.5 FIBER-WEAVE EFFECT6.6 ENVIRONMENTAL VARIATION IN DIELECTRIC BEHAVIOR6.7 TRANSMISSION-LINE PARAMETERS FOR LOSSY DIELECTRICS AND REALISTIC CONDUCTORSREFERENCESPROBLEMS
7.1 REMOVAL OF COMMON-MODE NOISE7.2 DIFFERENTIAL CROSSTALK7.3 VIRTUAL REFERENCE PLANE7.4 PROPAGATION OF MODAL VOLTAGES7.5 COMMON TERMINOLOGY7.6 DRAWBACKS OF DIFFERENTIAL SIGNALINGREFERENCESPROBLEMS

8.1 FREQUENCY-DOMAIN EFFECTS IN TIME-DOMAIN SIMULATIONS8.2 REQUIREMENTS FOR A PHYSICAL CHANNELREFERENCESPROBLEMS
9.1 HIGH-FREQUENCY VOLTAGE AND CURRENT WAVES9.2 NETWORK THEORY9.3 PROPERTIES OF PHYSICAL S-PARAMETERSREFERENCESPROBLEMS
10.1 CREATING A PHYSICAL TRANSMISSION-LINE MODEL10.2 NONIDEAL RETURN PATHS10.3 VIASREFERENCESPROBLEMS
11.1 I/O DESIGN CONSIDERATIONS11.2 PUSH-PULL TRANSMITTERS11.3 CMOS RECEIVERS11.4 ESD PROTECTION CIRCUITS11.5 ON-CHIP TERMINATION11.6 BERGERON DIAGRAMS11.7 OPEN-DRAIN TRANSMITTERS11.8 DIFFERENTIAL CURRENT-MODE TRANSMITTERS11.9 LOW-SWING AND DIFFERENTIAL RECEIVERS11.10 IBIS MODELS11.11 SUMMARYREFERENCESPROBLEMS
12.1 ANALYSIS AND DESIGN BACKGROUND12.2 CONTINUOUS-TIME LINEAR EQUALIZERS12.3 DISCRETE LINEAR EQUALIZERS12.4 DECISION FEEDBACK EQUALIZATION12.5 SUMMARYREFERENCESPROBLEMS
13.1 EYE DIAGRAM13.2 BIT ERROR RATE13.3 JITTER SOURCES AND BUDGETS13.4 NOISE SOURCES AND BUDGETS13.5 PEAK DISTORTION ANALYSIS METHODS13.6 SUMMARYREFERENCESPROBLEMS
14.1 MODEL DESIGN CONSIDERATIONS14.2 CASE STUDY: 10-GB/S DIFFERENTIAL PCB INTERFACE14.3 RSM CONSTRUCTION BY LEAST SQUARES FITTING14.4 MEASURES OF FIT14.5 SIGNIFICANCE TESTING14.6 CONFIDENCE INTERVALS14.7 SENSITIVITY ANALYSIS AND DESIGN OPTIMIZATION14.8 DEFECT RATE PREDICTION USING MONTE CARLO SIMULATION14.9 ADDITIONAL RSM CONSIDERATIONS14.10 SUMMARYREFERENCESPROBLEMS