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Computers as Components, 2nd Edition

Name: Computers as Components, 2nd Edition
Author: Marilyn Wolf
ISBN: 9780080886213

by Marilyn Wolf

July 2008

Intermediate to advanced

544 pages

16h 52m

English

Morgan Kaufmann

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Preface to The First Edition
Chapter 1. Embedded Computing
Introduction1.1 Complex Systems and Microprocessors
1.1.1 Embedding Computers
1.1.2 Characteristics of Embedded Computing Applications
1.1.3 Why Use Microprocessors?
1.1.4 The Physics of Software
1.1.5 Challenges in Embedded Computing System Design
1.1.6 Performance in Embedded Computing
1.2 The Embedded System Design Process
1.2.1 Requirements
1.2.2 Specification
1.2.3 Architecture Design
1.2.4 Designing Hardware and Software Components
1.2.5 System Integration
1.3 Formalisms for System Design
1.3.1 Structural Description
1.3.2 Behavioral Description
1.4 Model Train Controller
1.4.1 Requirements
1.4.2 DCC
1.4.3 Conceptual Specification
1.4.4 Detailed Specification (1/2)
1.4.4 Detailed Specification (2/2)
1.4.5 Lessons Learned
1.5 A Guided Tour of this Book
1.5.1 Chapter 2: Instruction Sets
1.5.2 Chapter 3: CPUs1.5.3 Chapter 4: Bus-Based Computer Systems
1.5.4 Chapter 5: Program Design and Analysis
1.5.5 Chapter 6: Processes and Operating Systems
1.5.6 Chapter 7: Multiprocessors
1.5.7 Chapter 8: Networks
1.5.8 Chapter 9: System Design Techniques
Summary
Further Reading
Questions
Lab Exercises
Chapter 2. Instruction Sets
Introduction2.1 Preliminaries2.1.1 Computer Architecture Taxonomy
2.1.2 Assembly Language
2.2 ARM Processor
2.2.1 Processor and Memory Organization
2.2.2 Data Operations (1/2)
2.2.2 Data Operations (2/2)
2.2.3 Flow of Control (1/2)
2.2.3 Flow of Control (2/2)
2.3 TI C55x DSP
2.3.1 Processor and Memory Organization
2.3.2 Addressing Modes
2.3.3 Data Operations
2.3.4 Flow of Control
2.3.5 C Coding Guidelines
Summary
Further ReadingQuestions
Lab Exercises
Chapter 3. CPUs
Introduction3.1 Programming Input and Output
3.1.1 Input and Output Devices
3.1.2 Input and Output Primitives
3.1.3 Busy-Wait I/O
3.1.4 Interrupts (1/3)
3.1.4 Interrupts (2/3)
3.1.4 Interrupts (3/3)
3.2 Supervisor Mode, Exceptions, and Traps
3.2.1 Supervisor Mode
3.2.2 Exceptions
3.2.3 Traps
3.3 Co-Processors
3.4 Memory System Mechanisms
3.4.1 Caches
3.4.2 Memory Management Units and Address Translation
3.5 CPU Performance
3.5.1 Pipelining
3.5.2 Caching
3.6 CPU Power Consumption
3.7 Design Example: Data Compressor
3.7.1 Requirements and Algorithm
3.7.2 Specification
3.7.3 Program Design (1/2)
3.7.3 Program Design (2/2)
3.7.4 Testing
Summary
Further Reading
Questions
Lab Exercises
Chapter 4. Bus-Based Computer Systems
Introduction4.1 The CPU Bus
4.1.1 Bus Protocols (1/2)
4.1.1 Bus Protocols (2/2)
4.1.2 DMA
4.1.3 System Bus Configurations
4.1.4 AMBA Bus
4.2 Memory Devices
4.2.1 Memory Device Organization
4.2.2 Random-Access Memories
4.2.3 Read-Only Memories
4.3 I/O Devices4.3.1 Timers and Counters
4.3.2 A/D and D/A Converters
4.3.3 Keyboards
4.3.4 LEDs
4.3.5 Displays
4.3.6 Touchscreens
4.4 Component Interfacing
4.4.1 Memory Interfacing
4.4.2 Device Interfacing
4.5 Designing with Microprocessors
4.5.1 System Architecture
4.5.2 Hardware Design
4.5.3 The PC as a Platform
4.6 Development and Debugging
4.6.1 Development Environments
4.6.2 Debugging Techniques
4.6.3 Debugging Challenges
4.7 System-Level Performance Analysis
4.7.1 System-Level Performance Analysis
4.7.2 Parallelism
4.8 Design Example: Alarm Clock
4.8.1 Requirements
4.8.2 Specification
4.8.3 System Architecture
4.8.4 Component Design and Testing
4.8.5 System Integration and Testing
Summary
Further Reading
Questions
Lab Exercises
Chapter 5. Program Design and Analysis
Introduction
5.1 Components for Embedded Programs
5.1.1 State Machines
5.1.2 Stream-Oriented Programming and Circular Buffers
5.1.3 Queues
5.2 Models of Programs
5.2.1 Data Flow Graphs
5.2.2 Control/Data Flow Graphs
5.3 Assembly, Linking, and Loading
5.3.1 Assemblers
5.3.2 Linking
5.4 Basic Compilation Techniques
5.4.1 Statement Translation
5.4.2 Procedures
5.4.3 Data Structures
5.5 Program Optimization
5.5.1 Expression Simplification
5.5.2 Dead Code Elimination
5.5.3 Procedure Inlining
5.5.4 Loop Transformations
5.5.5 Register Allocation
5.5.6 Scheduling
5.5.7 Instruction Selection
5.5.8 Understanding and Using Your Compiler
5.5.9 Interpreters and JIT Compilers
5.6 Program-Level Performance Analysis
5.6.1 Elements of Program Performance
5.6.2 Measurement-Driven Performance Analysis
5.7 Software Performance Optimization
5.7.1 Loop Optimizations
5.7.2 Performance Optimization Strategies
5.8 Program-Level Energy and Power Analysis and Optimization
5.9 Analysis and Optimization of Program Size
5.10 Program Validation and Testing
5.10.1 Clear-Box Testing (1/2)
5.10.1 Clear-Box Testing (2/2)
5.10.2 Black-Box Testing
5.10.3 Evaluating Function Tests
5.11 Software Modem
5.11.1 Theory of Operation and Requirements
5.11.2 Specification
5.11.3 System Architecture
5.11.4 Component Design and Testing
5.11.5 System Integration and TestingSummary
Further Reading
Questions
Lab Exercises
Chapter 6. Processes and Operating Systems
Introduction
6.1 Multiple Tasks and Multiple Processes
6.1.1 Tasks and Processes
6.1.2 Multirate Systems
6.1.3 Timing Requirements on Processes
6.1.4 CPU Metrics
6.1.5 Process State and Scheduling
6.1.6 Some Scheduling Policies
6.1.7 Running Periodic Processes
6.2 Preemptive Real-Time Operating Systems
6.2.1 Preemption
6.2.2 Priorities
6.2.3 Processes and Context
6.2.4 Processes and Object-Oriented Design
6.3 Priority-Based Scheduling
6.3.1 Rate-Monotonic Scheduling
6.3.2 Earliest-Deadline-First Scheduling
6.3.3 RMS vs. EDF
6.3.4 A Closer Look at Our Modeling Assumptions
6.4 Interprocess Communication Mechanisms
6.4.1 Shared Memory Communication
6.4.2 Message Passing
6.4.3 Signals
6.5 Evaluating Operating System Performance
6.6 Power Management and Optimization for Processes
6.7 Design Example: Telephone Answering Machine
6.7.1 Theory of Operation and Requirements
6.7.2 Specification
6.7.3 System Architecture
6.7.4 Component Design and Testing
6.7.5 System Integration and Testing
Summary
Further Reading
Questions
Lab Exercises
Chapter 7. Multiprocessors
Introduction7.1 Why Multiprocessors?
7.2 CPUs and Accelerators
7.2.1 System Architecture Framework
7.2.2 System Integration and Debugging
7.3 Multiprocessor Performance Analysis7.3.1 Accelerators and Speedup
7.3.2 Performance Effects of Scheduling and Allocation
7.3.3 Buffering and Performance
7.4 Consumer Electronics Architecture
7.4.1 Use Cases and Requirements
7.4.2 Platforms and Operating Systems
7.4.3 Flash File Systems
7.5 Design Example: Cell Phones
7.6 Design Example: Compact DISCs and DVDs
7.7 Design Example: Audio Players
7.8 Design Example: Digital Still Cameras
7.9 Design Example: Video Accelerator
7.9.1 Algorithm and Requirements
7.9.2 Specification
7.9.3 Architecture
7.9.4 Component Design
7.9.5 System Testing
Summary
Further Reading
Questions
Lab Exercises
Chapter 8. Networks
Introduction
8.1 Distributed Embedded Architectures
8.1.1 Why Distributed?
8.1.2 Network Abstractions
8.1.3 Hardware and Software Architectures
8.1.4 Message Passing Programming
8.2 Networks for Embedded Systems
8.2.1 The I2C Bus
8.2.2 Ethernet
8.2.3 Fieldbus
8.3 Network-Based Design
8.4 Internet-Enabled Systems
8.4.1 Internet
8.4.2 Internet Applications
8.4.3 Internet Security
8.5 Vehicles as Networks
8.5.1 Automotive Networks
8.5.2 Avionics
8.6 Sensor Networks
8.7 Design Example: Elevator Controller
8.7.1 Theory of Operation and Requirements
8.7.2 Specification
8.7.3 Architecture
8.7.4 Testing
Summary
Further ReadingQuestions
Lab Exercises
Chapter 9. System Design Techniques
Introduction9.1 Design Methodologies9.1.1 Why Design Methodologies?
9.1.2 Design Flows (1/2)
9.1.2 Design Flows (2/2)
9.2 Requirements Analysis
9.3 Specifications
9.3.1 Control-Oriented Specification Languages
9.3.2 Advanced Specifications
9.4 System Analysis and Architecture Design
9.5 Quality Assurance
9.5.1 Quality Assurance Techniques
9.5.2 Verifying the Specification
9.5.3 Design Reviews
Summary
Further ReadingQuestions
Lab Exercises
Appendix A. UML Notations
IntroductionA.1 Primitive ElementsA.2 Diagram Types
A.2.1 Class Diagram
A.2.2 State Diagram
A.2.3 Sequence and Collaboration Diagrams
Glossary (1/3)
Glossary (2/3)
Glossary (3/3)
References (1/2)
References (2/2)
Index (1/3)
Index (2/3)
Index (3/3)

Content preview from Computers as Components, 2nd Edition

4.1 The CPU Bus 165

Fast address

enable and fast

write/slow adrs,

slow write

Fast address

enable and fast

read/slow adrs,

slow read

Fast address

enable

Slow ack/fast ack

Slow data/fast data, fast ack

Fast data/

slow data

Slow ack

Bridge

Idle

Read

adrs

Read

data

Write

adrs

Write

data

Fast address

enable

Fast

read/write

Fast adrs

Fast data

Fast ack

Fast bus

(slave)

Slow address

enable

Slow

read/write

Slow adrs

Slow data

Slow ack

Slow bus

(master)

FIGURE 4.13

UML state diagram of bus bridge operation.

be overlapped as much as possible to reduce the latency of bus-to-bus transfers.

Similarly, the bottom sequence of states reads from the slow bus and writes the data

to the fast ...

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ISBN: 9780123743978

Cloud Computing

Data Engineering

Data Science

AI & ML

Programming Languages

Software Architecture

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Security

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Soft Skills

Computers as Components, 2nd Edition

by Marilyn Wolf

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