book

Digital Electronics

Name: Digital Electronics
Author: Betty Lincoln
ISBN: 9789332540828

by Betty Lincoln

January 2014

Intermediate to advanced

448 pages

11h 33m

English

Pearson India

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Cover
Title Page
Contents
Preface
Acknowledgement
DIGITAL SYSTEMS
DIGITAL TRANSMISSIONMULTIPLE CHOICE QUESTIONSDESCRIPTIVE QUESTIONS
NUMBERING SYSTEMS
INTRODUCTIONDECIMAL NUMBER SYSTEMBINARY NUMBERING SYSTEMOCTAL NUMBERING SYSTEMHEXADECIMAL NUMBERING SYSTEMCONVERSION OF NUMBERS FROM ONE BASE INTO ANOTHERBinary to DecimalDecimal to BinaryDecimal to OctalBinary to OctalOctal to BinaryDecimal to HexadecimalHexadecimal to DecimalBinary to HexadecimalARITHMETIC IN NUMBER SYSTEMBinary AdditionHexadecimal AdditionBINARY SUBTRACTIONNEGATIVE BINARY NUMBERSOne’s ComplementTwo’s ComplementBINARY MULTIPLICATIONBINARY DIVISIONNUMBER CODESWeighted CodesBinary Coded Decimal (BCD) or 8421 CodeAdvantages of BCD CodesDisadvantages of BCD CodesExcess-3 CodesGRAY CODEConversion of Binary to Gray CodeConversion of Gray Code to BinaryNon-Boolean Gray CodeAdvantages of the Gray CodeLimitations of the Gray CodeApplications of the Gray CodeALPHANUMERIC CODESHollerith CodeAmerican Standard Code for Information Interchange (ASCII)Extended Binary Coded Decimal Interchange Code (EBCDIC)PARITY METHOD FOR ERROR DETECTIONRepetition CodeCyclic Redundancy Check CodeHamming CodeMULTIPLE CHOICE QUESTIONSAnswersDESCRIPTIVE QUESTIONS
LOGIC GATES
INTRODUCTIONPOSITIVE AND NEGATIVE LOGICPositive Logic SystemNegative Logic SystemAND GateOR GATENOT GATEUNIVERSAL GATESNAND AS A UNIVERSAL GATEOPERATION OF A NAND GATENegative OR-Equivalent Operation of a NAND GateNOR GATEOPERATION OF NOR GATELogic Expressions for a NOR GateNegative-AND Equivalent Operation of the NOR GateTHE EXCLUSIVE-OR AND EXCLUSIVE-NOR GATESXOR GateOPERATION OF XOR GATEEX-NOR GATE (EXNOR/XNOR)Operation of XNOR GateIEEE SYMBOLSADDITIONAL EXAMPLESMULTIPLE CHOICE QUESTIONSAnswersDESCRIPTIVE QUESTIONS
BOOLEAN ALGEBRA
FUNDAMENTAL SYMBOLS—BOOLEAN ALGEBRABOOLEAN ALGEBRAIC PROPERTIESDE MORGAN’S THEOREMTheorem 1Theorem 2LOGIC AXIOMSSingle Variant TheoremsMultivariate TheoremsRules Considered while Operating Logic ExpressionsMINTERMS AND MAXTERMSMintermMaxtermsAdditional ExamplesMULTIPLE CHOICE QUESTIONSAnswersDESCRIPTIVE QUESTIONS
KARNAUGH MAPPING
KARNAUGH MAP FOR TWO VARIABLESKARNAUGH MAP FOR THREE VARIABLESKARNAUGH MAP FOR FOUR VARIABLESKARNAUGH MAP FOR FIVE VARIABLESPairsQuadsOctetOverlapping GroupsMap RollingRULES IN KARNAUGH MAPPINGProduct of Sum Form (POS)Don’t Care ConditionsADDITIONAL EXAMPLESSUMMARYMULTIPLE CHOICE QUESTIONSAnswersDESCRIPTIVE QUESTIONS

IMPLEMENTATION OF UNIVERSAL GATES
NAND IMPLEMENTATIONImplementing an Inverter Using Only NAND GateImplementing AND Using Only NAND GatesImplementing OR Using Only NAND GatesNOR AS A UNIVERSAL GATEImplementing an Inverter Using Only NOR GateImplementing OR Using Only NOR GatesImplementing AND Using Only NOR GatesEQUIVALENT GATESNAND and NOR IMPLEMENTATION TO BOOLEAN FUNCTIONSNAND-AND and AND-NOR IMPLEMENTATIONNOR-OR IMPLEMENTATION and OR-NAND IMPLEMENTATIONMULTIPLE CHOICE QUESTIONSAnswersDESCRIPTIVE QUESTIONS
INTEGRATED CIRCUITS AND LOGIC FAMILIES
INTRODUCTIONCLASSIFICATION OF ICsCLASSIFICATION BASED ON SIZECOMMON DIGITAL IC TERMINOLOGYCHARACTERISTICS OF LOGIC FAMILIESFan-InFan-OutNoise Immunity and Noise MarginTime DelayPower DissipationSEMICONDUCTOR DIODES AND TRANSISTORSSEMICONDUCTOR DIODESPN DiodesWorking of PN DiodeSEMICONDUCTOR TRANSISTORSBipolar Transistor (BJT)Field-Effect Transistor (FET)Metal Oxide SemiconductorsLOGIC FAMILIESDiode LogicResistor–Transistor Logic (RTL)Diode–Transistor Logic (DTL)Transistor–Transistor Logic (TTL)Emitter-Coupled LogicComplementary Metal-Oxide SemiconductorComparison of TTL and CMOS Logic FamiliesIC PACKAGINGTROUBLESHOOTING IN DIGITAL DEVICESLogic PulserLogic ProbeSUMMARYMULTIPLE CHOICE QUESTIONSAnswersDESCRIPTIVE QUESTIONS
COMBINATIONAL LOGIC CIRCUITS
COMBINATIONAL CIRCUITSBINARY ADDERSHALF ADDERFULL ADDERADDITION OF MORE THAN 2 BITS BY FULL ADDERLook-Ahead Carry AdderPARALLEL ADDER–SUBRACTORBinary MultiplierMULTIPLEXERS2 × 1 MULTIPLEXER4 × 1 MULTIPLEXERQUAD 2 × 1 MULTIPLEXERIMPLEMENTATION OF BOOLEAN FUNCTIONS USING MULTIPLEXERsCombinational Circuit Implementation using MultiplexersDEMULTIPLEXERCODE CONVERTORSDECODERSENCODERSMajor Limitation of EncodersMULTIPLE CHOICE QUESTIONSAnswersDESCRIPTIVE QUESTIONS
FLIP-FLOPS
LATCHSR LatchSR Latch Using NOR GatesContact Bounce EliminatorCLOCKED SR LATCHCLOCK PULSESD LATCHMASTER–SLAVE D FLIP-FLOPEDGE-TRIGGERED d FLIP-FLOPJK FLIP-FLOPOperation of JK Flip-FlopThe Race-around ConditionMASTER–SLAVE JK FLIP-FLOPJK Flip-Flop Data TransferT FLIP-FLOPCONVERSIONS OF FLIP-FLOPSSR Flip-Flop to JK Flip-FlopJK Flip-Flop to SR Flip-FlopD Flip-Flop to SR Flip-FlopJK Flip-Flop to T Flip-FlopJK Flip-Flop to D Flip-FlopD Flip-Flop to JK Flip-FlopRS to T Flip-FlopD Flip-Flop to T Flip-FlopAPPLICATIONS OF FLIP-FLOPSFrequency DivisionParallel Data StorageMULTIVIBRATORSBISTABLE MULTIVIBRATORMONOSTABLE MULTIVIBRATORASTABLE MULTIVIBRATORSCHMITT TRIGGERIC 555 TIMERMULTIPLE CHOICE QUESTIONSAnswersDESCRIPTIVE QUESTIONS
REGISTERS
SHIFT REGISTERSClassifications of Shift RegistersBIDIRECTIONAL SHIFT REGISTERSMode Control HighMode Control LowUNIVERSAL SHIFT REGISTERSHIFT REGISTERS APPLICATIONSRing CountersJohnson CounterSequence GeneratorTime DelaySerial to Parallel Conversion or Vice VersaUniversal Asynchronous Receiver Transmitter (UART)MULTIPLE CHOICE QUESTIONSAnswersDESCRIPTIVE QUESTIONS
COUNTERS
MOD-3 COUNTERMOD-16 OR MOD-4 BIT COUNTERDOWN COUNTERS3-bit or MOD-8 Down CounterDESIGNING OF RIPPLE COUNTER DIVIDED BY NDECADE COUNTER OR MOD-10 RIPPLE COUNTERBCD COUNTERDECODING A COUNTERUP/DOWN COUNTERPARALLEL COUNTER (or) SYNCHRONOUS COUNTERMaximum Clock FrequencyDECADE SYNCHRONOUS COUNTERSYNCHRONOUS UP/DowN COUNTERIC COUNTERSAPPLICATIONS OF COUNTERSAdditional ExamplesMULTIPLE CHOICE QUESTIONSAnswersDESCRIPTIVE QUESTIONS
MEMORY
Random Access Memory (RAM)Static Random Access Memory (SRAM)DYNAMIC RANDOM ACCESS MEMORY (DRAM)GENERAL DRAM MODULESSingle In-line Pin Package (SIPP)Dual In-line Package (DIP)DRAM MEMORY MODULESSingle In-line Memory Module (SIMM)Dual In-line Memory Module (DIMM)Video RAM (VRAM) and Window DRAM (WRAM)Fast Page Mode DRAM (FPM DRAM)Extended Data Out DRAM (EDO DRAM)Burst EDO DRAM (BEDO DRAM)SDRAM (Synchronous DRAM) and DDR SDRAM (Double-Data Rate DRAM)READ ONLY MEMORYPROGRAMMABLE READ ONLY MEMORYEPROM and EEPROMElectrically Erasable PROM (EEPROM)FLASH MEMORYMagneto Resistive RAM (MRAM)PROGRAMMABLE ARRAY LOGICPROGRAMMABLE LOGIC ARRAYDifference Between RAM and ROM MemorySUMMARYMULTIPLE CHOICE QUESTIONSAnswersDESCRIPTIVE QUESTIONS
DISPLAY DEVICES
CATHODE RAY TUBES (CRTs)WorkingColour CRTsFrame BuffersLIQUID CRYSTAL DISPLAYS (LCD)Types of LCDsConstruction of LCD DisplayWorking of LCD with a Twisted Nematic CrystalColour LCDAdvantagesDisadvantagesLIQUID CRYSTALS ON SILICON (LCOS)AdvantagesWorking of LCOSLIGHT EMITTING DIODES (LED)Advantages of LEDsDisadvantagesLED Display7-SEGMENT DISPLAYConstruction and WorkingINTRODUCTION TO ORGANIC LIGHT EMITTING DIODES (OLED)Components of OLEDConstruction of OLEDWorking of OLEDsTypes of OLEDsLifetime and Device StabilityAdvantagesDisadvantagesPLASMA DISPLAYSWorking of Gas Plasma DisplaysTypes of Gas Plasma DisplaysDIGITAL LIGHT PROCESSINGWorking of DLPAdvantages of DLPE-BOOKS/E-INKAdvantagesMULTIPLE CHOICE QUESTIONSAnswersDESCRIPTIVE QUESTIONS
CONVERTORS
ANALOG-TO-DIGITAL CONVERSIONPrinciple of ADCADC PROCESSACCURACY OF A/D CONVERSIONTYPES OF A/D CONVERTERSDIGITAL RAMP ADCSUCCESSIVE APPROXIMATION ADCAdvantagesDisadvantagesFLASH A/D CONVERTERAdvantagesDisadvantagesSIGMA-DELTA A/D CONVERTERAdvantagesDisadvantagesDUAL SLOPE CONVERTORAdvantagesDisadvantagesDIGITAL-TO-ANALOG CONVERTORSCharacteristics of DACTypes of DACBinary-Weighted Resistor DACAdvantagesDisadvantagesResistor Ladder D/A ConverterAPPLICATIONS OF DACMULTIPLE CHOICE QUESTIONSAnswersDESCRIPTIVE QUESTIONS
COMPUTER FUNDAMENTALS
INTRODUCTIONCOMPUTER CHARACTERISTICSEVOLUTION OF COMPUTERSGENERATIONS OF COMPUTERSFirst Generation (1940–1956): Vacuum TubesSecond Generation (1956–1963): TransistorsThird Generation (1964–1970s): Integrated CircuitsFourth Generation (1970s onwards): MicroprocessorsFifth Generation (Present and Future): Artificial IntelligenceCLASSIFICATION OF COMPUTERSData Handled TypeBased on UtilityBased on Size and CapacityAdvantages of MicrocomputersDisadvantages of MicrocomputersAdvantages of MinicomputersDisadvantages of MinicomputersAdvantages of SupercomputersBased on Usage ModeCOMPONENTS OF DIGITAL COMPUTERSCentral Processing Unit (CPU)Arithmetic Logic Unit (ALU)Control Unit (CU)Memory Unit (MU)Cache MemorySecondary Storage DevicesTypes of DisksINPUT–OUTPUT DEVICESKeyboardMouseTypes of MouseJoystickTouch ScreensLight PenBarcode ReaderOptical Code Reader (OCR)Magnetic Ink Character Reader (MICR)OUTPUT DEVICESsMonitorPrinterPlotterSpeech Input UnitCOMPUTER SOFTWARESystem SoftwareApplication SoftwareCOMPUTER LANGUAGESLow Level LanguageMachine LanguageAssembly LanguageHigh Level LanguageTranslating Computer Languages : Compiler and AssemblerMULTIPLE CHOICE QUESTIONSDESRIPTIVE QUESTIONS
ELECTRONIC EXERCISES
CMOS GATE – CD 4001 NORAimProcedureResultModulus Counter – JK FLIP-FLOPSAimProcedureResultMODULUS COUNTER - D FLIP-FLOPS 7474AimProcedureResultMODULUS COUNTERS – JK FLIP-FLOPS – SYNCHRONOUSAimProcedureResultMODULUS COUNTER – DECADE COUNTER (7490)AimProcedureResultSTUDY OF 8-BIT SHIFT REGISTER (7495)AimProcedureResultSTUDY OF UP/DOWN COUNTERAimProcedureResultDESIGN OF COUNTERSAimProcedureResultSTUDY OF BINARY ADDER AND SUBTRACTOR CIRCUITSAimProcedureResultSTUDY OF ALU AND BCD ADDER CIRCUITSAimProcedureResultSTUDY OF DEMUX CIRCUITSAimProcedureResultSTUDY OF DIGITAL ENCODER/DECODER CIRCUITSAimProcedureResultSTUDY OF RAMAimProcedureREAD/WRITE Operations of 16 × 4-bit RAM 7489ResultA/D CONVERTERAimProcedureResultD/A CONVERTERAimProcedureResultSTUDY OF MUXAimProcedureResult
Index

Content preview from Digital Electronics

ELECTRONIC EXERCISES

CMOS GATE – CD 4001 NOR

Aim

To prove that NOR gate is a universal gate using CMOS NOR
To construct gating circuits using CMOS NOR
To construct an stable multivibrator using CMOS NOR

Procedure

NOR Gate – Universal Gate:

To prove that NOR gate is a universal gate using CMOS NOR. We connect or make use of the IC 4001 as a NOT by shorting the 2 inputs and obtained the output . In this the pin 14 is connected to +ve and the 7th pin is grounded. We also ground 5, 6, 8, 9, 12, and 13.

Pin Configuration:

NOR Gate – Universal Gate: ...

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Digital Electronics

by Betty Lincoln