ARMTHE WORLD’S MOST POPULAR 32BIT EMBEDDED PROCESSOR 397
In this setup, the fl ash memory is arranged as a bank of 128 bits such that each
access to fl ash allows 128 bits to be accessed. is will require the fl ash to be organized
as 4 memory modules, where each module will have a bandwidth of 32 bits and thus
eff ectively 128 bits at a time. In practice, the speed of memory will not get multiplied
by 4, but it improves the speed over the case of having a fl ash memory and 32 bits
access, at a time. All the extra hardware to get this done is in the memory controller,
i.e., the MAM.
11.3 | Peripherals
Section 11.2 contains a list of the peripherals available in this chip. Each of the peripher-
als has addresses and the peripherals use the memor ...