Embedded Systems: An Integrated Approach by Pearson

ARMTHE WORLD’S MOST POPULAR 32BIT EMBEDDED PROCESSOR 417

Figure 11.16 shows the six bits of the PWMLER register, each bit enabling the

latching of, match register 0 (MR0) to Match register 6, when set.

Example 11.10 uses PWMLER = 0x8, corresponding to the enabling of only

PWM3 latch.

Example 11.10

#include<LPC214x.h>

void PWM_InIt(void)

{

PINSEL0 | = 0x00000008; //Enable P0.1 as PWM output

PWMPR = 0x00000000; //No prescaling

PWMPCR = 0x00000800; // PWM 3 single edge control,

output

//enabled

PWMMR0 = 0xFFF; // Fix up the pulse repletion

rate

PWMTCR = 0x00000009; // Enable PWM mode and PWM

timer

//counting

}

int main()

{

PWM_InIt();

while(1) ...