Embedded Systems: An Integrated Approach by Pearson

BUSES AND PROTOCOLS 171

Figure 5.11 shows the data transfer between a master and a slave.  ere are shift

registers in the master and slave which are serially connected using the MOSI and

MISO pins. In this interconnection, a bit is shifted from master to slave and slave to

master simultaneously (full duplex). Not all transmissions require all these operations to

be meaningful but this is the way the protocol works. If, say, the individual shift registers

are 8 bits long, it is apparent that after 8 clock cycles, the data in the master and slave

gets exchanged.  e length of the shift registers is decided by the manufacturer of the

SPI controller ...