High-Speed Devices and Circuits with THz Applications

7   Equalization and Multilevel Modulation for Multi-Gbps Chip-to-Chip Links

Anthony Chan Carusone

CONTENTS

7.1   Introduction

7.2   Applications

7.2.1   Parallel Buses

7.2.2   Serial Links over Backplanes

7.3   Link Modeling

7.3.1   Linear Two-Port Networks

7.3.2   The Transmission Line

7.3.3   Complete Links

7.4   Equalization

7.4.1   Transmit Equalization

7.4.2   Receive Equalization

7.4.3   Crosstalk

7.5   Modulation

7.5.1   Serial Links

7.5.2   Parallel Buses

7.6   Conclusion

Appendix

Impedance Matrices

Admittance Matrices

Scattering Parameters

RLGC Values

Acknowledgments

References

7.1   INTRODUCTION

To avoid becoming a bottleneck in large electronic systems, the bit rates that must be communicated over chip-to-chip communication links ...