9 Latchup Circuit Solutions
9.1 Introduction
Single‐event latchup (SEL) can occur within a circuit, or between circuits. Latchup is highly influenced by the types of circuits, and how these circuits interact during design integration and synthesis. In this chapter, we will focus on the types of circuits that cause latchup, the integration of these networks, and the interactions that can occur [1–20]. We will close the discussion by providing examples of circuit solutions, novel circuits, active clamps, and active guard rings to address latchup.
System‐level latchup can be addressed by introduction of latchup prevention specific semiconductor components. Today, specific control chips can be integrated into systems to avoid latchup. For example, spacecraft system electronics have incorporated techniques into systems to provide SEL immunity to events. The latchup protection circuitry is integrated on the same physical package as the latchup sensitive device. These latchup prevention networks can set a “threshold” based on a known sensitivity level, provide a means of detection of particle event, provide a current limitation of the device that is undergoing latchup, can shut down the system, and then reset to its original state. These are techniques used today to address latchup to avoid system‐level latchup concerns.
9.2 Power Supply Concepts
Chip design architecture also plays a role in latchup prevention. In latchup, the semiconductor chip cannot latchup given that ...
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