The Circuit Designer's Companion, 2nd Edition

The Circuit Designer's Companion, 2nd Edition

by Tim Williams
Released November 2004
Publisher(s): Newnes
ISBN: 9780080476513

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Book description

Tim Williams' Circuit Designer's Companion provides a unique masterclass in practical electronic design that draws on his considerable experience as a consultant and design engineer. As well as introducing key areas of design with insider's knowledge, Tim focuses on the art of designing circuits so that every production model will perform its specified function – and no other unwanted function - reliably over its lifetime. The combination of design alchemy and awareness of commercial and manufacturing factors makes this an essential companion for the professional electronics designer. Topics covered include analog and digital circuits, component types, power supplies and printed circuit board design. The second edition includes new material on microcontrollers, surface mount processes, power semiconductors and interfaces, bringing this classic work up to date for a new generation of designers.

· A unique masterclass in the design of optimized, reliable electronic circuits· Beyond the lab - a guide to electronic design for production, where cost-effective design is imperative · Tips and know-how provide a whole education for the novice, with something to offer the most seasoned professional

Table of contents

  1. Cover
  2. The Circuit Designer's Companion
  3. Contents (1/2)
  4. Contents (2/2)
  5. Introduction
    1. Introduction to the second edition
  6. Chapter 1 Grounding and wiring
    1. 1.1 Grounding
      1. When to consider grounding
      2. 1.1.1 Grounding within one unit
      3. 1.1.2 Chassis ground
      4. 1.1.3 The conductivity of aluminium
        1. Other materials
      5. 1.1.4 Ground loops
      6. 1.1.5 Power supply returns
        1. Varying loads
        2. Power rail feed
        3. Conductor impedance
      7. 1.1.6 Input signal ground
        1. Connection to 0V elsewhere on the pcb
        2. Connection to 0V within the unit
        3. External ground connection
      8. 1.1.7 Output signal ground
        1. Avoiding the common impedance
      9. 1.1.8 Inter-board interface signals
        1. Partitioning the signal return
      10. 1.1.9 Star-point grounding
      11. 1.1.10 Ground connections between units
        1. Breaking the ground link
      12. 1.1.11 Shielding
        1. Which end to ground for LF shielding
        2. Electrostatic screening
        3. Surface transfer impedance
      13. 1.1.12 The safety earth
    2. 1.2 Wiring and cables
      1. 1.2.1 Wire types
        1. Wire inductance
        2. Equipment wire
      2. 1.2.2 Cable types
      3. 1.2.3 Power cables
      4. 1.2.4 Data and multicore cables
        1. Data communication cables
        2. Structured data cable
        3. Shielding and microphony
      5. 1.2.5 RF cables
      6. 1.2.6 Twisted pair
      7. 1.2.7 Crosstalk
        1. Digital crosstalk
    3. 1.3 Transmission lines
      1. Transmission line effects
      2. Critical lengths for pulses
      3. 1.3.1 Characteristic impedance
      4. 1.3.2 Time domain
        1. Forward and reflected waves
        2. Ringing
        3. The Bergeron diagram
        4. The uses of mismatching
      5. 1.3.3 Frequency domain
        1. Standing wave distribution vs. frequency
        2. Impedance transformation
        3. Lossy lines
  7. Chapter 2 Printed circuits
    1. 2.1 Board types
      1. 2.1.1 Materials
        1. Epoxy-glass
      2. 2.1.2 Type of construction
      3. 2.1.3 Choice of type
      4. 2.1.4 Choice of size
        1. Sub-division boundaries
        2. Panelisation
      5. 2.1.5 How a multilayer board is made
    2. 2.2 Design rules
      1. 2.2.1 Track width and spacing
        1. Conductor resistance
        2. Voltage breakdown and crosstalk
        3. Constant impedance
      2. 2.2.2 Hole and pad size
        1. Vias
        2. Through hole pads
        3. Surface mount pads
      3. 2.2.3 Track routing
      4. 2.2.4 Ground and power distribution
        1. Ground rail inductance
        2. Gridded ground layout
        3. The ground plane
        4. Inside or outside layers
        5. Multiple ground planes
      5. 2.2.5 Copper plating and finishing
      6. 2.2.6 Solder resist
        1. Screen printed resists
        2. Photo-imaged film
      7. 2.2.7 Terminations and connections
        1. Two-part connectors
        2. Edge connectors
    3. 2.3 Board assembly: surface mount and through hole
      1. 2.3.1 Surface mount design rules
        1. Solder process
        2. Printed circuit board quality
        3. Thermal stresses
        4. Cleaning and testing
      2. 2.3.2 Package placement
      3. 2.3.3 Component identification
        1. Polarity indication
    4. 2.4 Surface protection
      1. Variations in surface resistance
      2. Circuit design vs. surface resistance
      3. 2.4.1 Guarding
      4. 2.4.2 Conformal coating
        1. Coating vs. encapsulation
        2. Steps to take before coating
        3. Application
        4. Test and rework
    5. 2.5 Sourcing boards and artwork
      1. 2.5.1 Artwork
        1. Using a bureau
        2. Disadvantages of a bureau
      2. 2.5.2 Boards
  8. Chapter 3 Passive components
    1. 3.1 Resistors
      1. 3.1.1 Resistor types
        1. Surface mount chip
        2. Metal film
        3. Carbon
        4. Wirewound
        5. Precision resistors
        6. Resistor networks
      2. 3.1.2 Tolerancing
        1. Tolerance variations
      3. 3.1.3 Temperature coefficient
      4. 3.1.4 Power
      5. 3.1.5 Inductance
      6. 3.1.6 Pulse handling
        1. Limiting element voltage (LEV)
      7. 3.1.7 Extreme values
        1. Very low values
        2. Very high values
      8. 3.1.8 Fusible and safety resistors
      9. 3.1.9 Resistor networks
        1. Production efficiency
        2. Value tracking: thick film versus thin film
    2. 3.2 Potentiometers
      1. 3.2.1 Trimmer types
        1. Carbon
        2. Cermet
        3. Wirewound
        4. Multi-turn
      2. 3.2.2 Panel types
        1. Carbon, cermet and wirewound
        2. Conductive plastic
      3. 3.2.3 Pot applications
        1. Use as a rheostat
        2. Adjustability
        3. Law accuracy
        4. Manufacturing processes
    3. 3.3 Capacitors
      1. 3.3.1 Metallised film & paper
        1. Polyester
        2. Polycarbonate
        3. Polypropylene and polystyrene
        4. Metallised paper
      2. 3.3.2 Multilayer ceramics
        1. COG
        2. X5R and X7R
        3. Y5V and Z5U
      3. 3.3.3 Single-layer ceramics
        1. Barrier layer
        2. Low-K and High-K dielectrics
      4. 3.3.4 Electrolytics
        1. Construction
        2. Leakage
        3. Ripple current and ESR
        4. Temperature and lifetime
      5. 3.3.5 Solid tantalum
        1. Tantalum chip capacitors
      6. 3.3.6 Capacitor applications
        1. Value shifts
      7. 3.3.7 Series capacitors and dc leakage
        1. Adding bleed resistors
      8. 3.3.8 Dielectric absorption
      9. 3.3.9 Self resonance
        1. Consequences of self-resonance
    4. 3.4 Inductors
      1. 3.4.1 Permeability
        1. Ferrites
        2. Iron powder
      2. 3.4.2 Self-capacitance
      3. 3.4.3 Inductor applications
        1. Tuned circuits
        2. Power circuits
        3. Suppression
      4. 3.4.4 The danger of inductive transients
        1. Relay coils
        2. Transient protection
        3. Protection against negative transients
        4. AC circuits
    5. 3.5 Crystals and resonators
      1. Angle of cut
      2. 3.5.1 Resonance
      3. 3.5.2 Oscillator circuits
        1. Drive level resistance
        2. Series circuit
        3. Layout
      4. 3.5.3 Temperature
      5. 3.5.4 Ceramic resonators
  9. Chapter 4 Active components
    1. 4.1 Diodes
      1. 4.1.1 Forward bias
        1. Forward current
        2. Temperature dependence of forward voltage
      2. 4.1.2 Reverse bias
        1. Breakdown
      3. 4.1.3 Leakage
        1. Leakage variability
      4. 4.1.4 High-frequency performance
      5. 4.1.5 Switching times
        1. Reverse recovery
        2. Interference due to fast recovery
      6. 4.1.6 Schottky diodes
        1. General purpose
        2. RF mixers
        3. Rectifiers
      7. 4.1.7 Zener diodes
        1. Slope resistance
        2. Leakage
        3. Temperature coefficient
        4. Precision zeners
        5. Zener noise
      8. 4.1.8 The Zener as a clamp
        1. An application example
    2. 4.2 Thyristors and triacs
      1. 4.2.1 Thyristor versus triac
      2. 4.2.2 Triggering characteristics
      3. 4.2.3 False triggering
      4. 4.2.4 Conduction
      5. 4.2.5 Switching
        1. Turn-off
      6. 4.2.6 Snubbing
        1. Values for R and C
    3. 4.3 Bipolar transistors
      1. 4.3.1 Leakage
        1. A simple leakage example
        2. Adding a base-emitter resistor
      2. 4.3.2 Saturation
      3. 4.3.3 The Darlington
      4. 4.3.4 Safe operating area
        1. Second breakdown
        2. SOA curve
      5. 4.3.5 Gain
      6. 4.3.6 Switching and high frequency performance
        1. Speeding up the turn-off
      7. 4.3.7 Grading
    4. 4.4 Junction Field Effect transistors
      1. 4.4.1 Pinch-off
      2. 4.4.2 Applications
        1. Analogue switches
        2. Current regulators
      3. 4.4.3 High impedance circuits
        1. The gate current breakpoint
        2. Depressed Z[sub(in)]
    5. 4.5 MOSFETs
      1. 4.5.1 Low-power MOSFETs
        1. Gate breakdown
        2. Protection for the gate
        3. MOSFET tradeoffs
      2. 4.5.2 VMOS Power FETs
      3. 4.5.3 Gate drive impedance
        1. Gate-source overvoltage
        2. Source lead inductance
      4. 4.5.4 Switching speed
      5. 4.5.5 On-state resistance
        1. P-channel VMOS
    6. 4.6 IGBTs
      1. 4.6.1 IGBT structure
      2. 4.6.2 Advantages over MOSFETs and bipolars
      3. 4.6.3 Disadvantages
  10. Chapter 5 Analogue integrated circuits
    1. 5.1 The ideal op-amp
      1. 5.1.1 Applications categories
    2. 5.2 The practical op-amp
      1. 5.2.1 Offset voltage
        1. Output saturation due to amplified offset
        2. Reducing the effect of offset
        3. Offset drift
        4. Circuit techniques to remove the effect of drift
      2. 5.2.2 Bias and offset currents
        1. Bias current levels
        2. Output offsets due to bias and offset currents
      3. 5.2.3 Common mode effects
        1. CMRR
        2. PSRR
      4. 5.2.4 Input voltage range
        1. Absolute maximum input
      5. 5.2.5 Output parameters
        1. Power rail voltage
        2. Load impedance
      6. 5.2.6 AC parameters
      7. 5.2.7 Slew rate and large signal bandwidth
        1. Slew rate
        2. Large-signal bandwidth
        3. Slewing distortion
      8. 5.2.8 Small-signal bandwidth
      9. 5.2.9 Settling time
      10. 5.2.10 The oscillating amplifier
        1. Ground coupling
        2. Power supply coupling
        3. Output stage instability
        4. Stray capacitance at the input
        5. Parasitic feedback
      11. 5.2.11 Open-loop gain
        1. Sagging A[sub(OL)]
      12. 5.2.12 Noise
        1. Thermal noise
        2. Amplifier noise
        3. Noise bandwidth
      13. 5.2.13 Supply current and voltage
        1. Supply voltage
        2. Supply current
        3. I[sub(S)] vs. speed and dissipation
      14. 5.2.14 Temperature ratings
        1. Specification validity
        2. Package reliability
      15. 5.2.15 Cost and availability
        1. When to use industry standards
        2. When not to use industry standards
        3. Quad or dual packages
      16. 5.2.16 Current feedback op-amps
    3. 5.3 Comparators
      1. 5.3.1 Output parameters
      2. 5.3.2 AC parameters
        1. Overdrive
        2. Load impedance
        3. The advantages of the active low
        4. Pulse timing error
      3. 5.3.3 Op-amps as comparators (and vice versa)
      4. 5.3.4 Hysteresis and oscillations
        1. The subtle effects of edge oscillation
        2. Minimise stray feedback
        3. Hysteresis
      5. 5.3.5 Input voltage limits
        1. Comparator parameters vs. input voltage
      6. 5.3.6 Comparator sourcing
    4. 5.4 Voltage references
      1. 5.4.1 Zener references
      2. 5.4.2 Band-gap references
        1. Costs and interchangeability
      3. 5.4.3 Reference specifications
        1. Line and load regulation
        2. Output voltage tolerance
        3. Ouput voltage temperature coefficient
        4. Long-term stability
        5. Settling time
        6. Minimum supply current
    5. 5.5 Circuit modelling
  11. Chapter 6 Digital circuits
    1. 6.1 Logic ICs
      1. 6.1.1 Noise immunity and thresholds
        1. Susceptibility to noise
        2. Current immunity
        3. Use of a pull-up
        4. Dynamic noise immunity
      2. 6.1.2 Fan-out and loading
        1. Dynamic loading
      3. 6.1.3 Induced switching noise
        1. Synchronous switching
      4. 6.1.4 Decoupling
        1. Distance
      5. 6.1.5 Unused gate inputs
    2. 6.2 Interfacing
      1. 6.2.1 Mixing analogue and digital
        1. Ground noise
        2. Filtering
        3. Segregation
        4. Single-board systems
        5. Multi-board systems
      2. 6.2.2 Generating digital levels from analogue inputs
        1. De-bouncing switch inputs
      3. 6.2.3 Protection against externally-applied overvoltages
      4. 6.2.4 Isolation
        1. Opto-coupler trade-offs
        2. Coupling capacitance
        3. Alternatives to opto-couplers
      5. 6.2.5 Classic data interface standards
        1. EIA-232F
        2. EIA-422
        3. Interface design
      6. 6.2.6 High performance data interface standards
        1. EIA-485
        2. CAN
        3. USB
        4. Ethernet
    3. 6.3 Using microcontrollers
      1. 6.3.1 How a microcontroller does your job
        1. Input processes
        2. Instructions and internal processing
        3. Output processes
      2. 6.3.2 Timing and quantisation constraints
        1. Instruction cycle time
        2. Real time interrupts and latency
        3. Limits on A-D/D-A conversion
        4. PWM-style outputs
        5. Sleep and wake-up
      3. 6.3.3 Programming constraints
        1. High-level language or assembler?
    4. 6.4 Microprocessor watchdogs and supervision
      1. 6.4.1 The threat of corruption
        1. Power rail supervision
      2. 6.4.2 Watchdog design
        1. Basic operation
        2. Timeout period
        3. Timer hardware
        4. Connection to the microprocessor
        5. Source of the re-trigger pulse
        6. Generation of the re-trigger pulses in
        7. Testing the watchdog
      3. 6.4.3 Supervisor design
        1. Undervoltage and power fail monitor
        2. Protecting non-volatile memory
        3. V[sub(CC)] differential
    5. 6.5 Software protection techniques
      1. 6.5.1 Input data validation and averaging
        1. Digital inputs
        2. Interrupts
      2. 6.5.2 Data and memory protection
        1. Data communication
        2. Unused program memory
      3. 6.5.3 Re-initialisation
  12. Chapter 7 Power supplies
    1. 7.1 General
      1. 7.1.1 The linear supply
      2. 7.1.2 The switch-mode supply
      3. 7.1.3 Specifications
      4. 7.1.4 Off the shelf versus roll your own
        1. Costs
    2. 7.2 Input and output parameters
      1. 7.2.1 Voltage
      2. 7.2.2 Current
      3. 7.2.3 Fuses
      4. 7.2.4 Switch-on surge, or inrush current
        1. Current limiting
        2. PTC thermistor limiting
      5. 7.2.5 Waveform distortion and interference
        1. Interference
        2. Peak current summation
        3. Power factor correction
      6. 7.2.6 Frequency
      7. 7.2.7 Efficiency
      8. 7.2.8 Deriving the input voltage from the output
        1. Power losses at high input voltage
      9. 7.2.9 Low-load condition
        1. Maximum regulator dissipation
        2. Minimum load requirement
      10. 7.2.10 Rectifier and capacitor selection
        1. Reservoir capacitor
        2. Rectifiers
      11. 7.2.11 Load and line regulation
        1. Thermal regulation
        2. Load sensing
      12. 7.2.12 Ripple and noise
        1. Switching noise
        2. Layout to avoid ripple
        3. Correct reservoir connection
      13. 7.2.13 Transient response
        1. Switch-mode vs. linear
    3. 7.3 Abnormal conditions
      1. 7.3.1 Output overload
        1. Constant current limiting
        2. Foldback current limiting
      2. 7.3.2 Input transients
        1. Interruptions
        2. Spikes and surges
      3. 7.3.3 Transient suppressors
      4. 7.3.4 Overvoltage protection
        1. Crowbar circuit requirements
      5. 7.3.5 Turn-on and turn-off
        1. PSU supervisor circuits
    4. 7.4 Mechanical requirements
      1. 7.4.1 Case size and construction
        1. Open frame
        2. Enclosed
        3. Encapsulated
        4. Rack mounting modules or cassettes
      2. 7.4.2 Heatsinking
      3. 7.4.3 Safety approvals
    5. 7.5 Batteries
      1. 7.5.1 Initial considerations
        1. Voltage and capacity ratings
        2. Series and parallel connection
        3. Mechanical design
        4. Storage, shelf life and disposal
      2. 7.5.2 Primary cells
        1. Alkaline manganese dioxide
        2. Silver oxide
        3. Zinc air
        4. Lithium
      3. 7.5.3 Secondary cells
        1. Lead-acid
        2. Nickel-cadmium
        3. Nickel Metal Hydride
        4. Lithium-ion
      4. 7.5.4 Charging
        1. Lead-acid
        2. NiCad and NiMH
        3. Lithium Ion
  13. Chapter 8 Electromagnetic compatibility
    1. 8.1 The need for EMC
      1. The importance of EMC
      2. 8.1.1 Immunity
        1. Radio transmitters
        2. Radars
        3. Transients
        4. ESD
        5. Determining and specifying the effects of interference
      3. 8.1.2 Emissions
        1. Emissions from digital equipment
    2. 8.2 EMC legislation and standards
      1. United States
      2. Australasia
      3. 8.2.1 The EMC Directive
        1. Scope and coverage
        2. Routes to compliance
        3. Harmonised versus non-harmonised standards
      4. 8.2.2 Existing standards
        1. Immunity
    3. 8.3 Interference coupling mechanisms
      1. 8.3.1 Conducted
      2. 8.3.2 Radiated
        1. Electromagnetic induction
    4. 8.4 Circuit design and layout
      1. 8.4.1 Choice of logic
        1. Noise margin, clock frequency and power supply noise
      2. 8.4.2 Analogue circuits
      3. 8.4.3 Software
    5. 8.5 Shielding
      1. Shielding effectiveness
      2. 8.5.1 Apertures
      3. 8.5.2 Seams
    6. 8.6 Filtering
      1. 8.6.1 The low-pass filter
        1. Impedances
        2. Components and layout
      2. 8.6.2 Mains filters
        1. Safety requirements
        2. Insertion loss versus impedance and current
      3. 8.6.3 I/O filters
      4. 8.6.4 Feedthrough and 3-terminal capacitors
        1. Feedthroughs
        2. Circuit considerations
    7. 8.7 Cables and connectors
      1. Properly terminating the cable shield
      2. Screened backshells
    8. 8.8 EMC design checklist
  14. Chapter 9 General product design
    1. 9.1 Safety
      1. The hazards of electricity
      2. 9.1.1 Safety classes
      3. 9.1.2 Insulation types
        1. Basic insulation
        2. Double insulation
        3. Reinforced insulation
      4. 9.1.3 Design considerations for safety protection
      5. 9.1.4 Fire hazard
    2. 9.2 Design for production
      1. 9.2.1 Checklist
        1. Sourcing
        2. Production
        3. Testing and calibration
        4. Installation
      2. 9.2.2 The dangers of ESD
        1. Generation of ESD
        2. Static protection
    3. 9.3 Testability
      1. 9.3.1 In-circuit testing
      2. 9.3.2 Functional testing
        1. ATE
      3. 9.3.3 Boundary scan and JTAG
        1. History
        2. Description of the boundary scan method
        3. Devices
        4. Deciding whether or not to use boundary scan
      4. 9.3.4 Design techniques
        1. Bed-of-nails probing
        2. Test connections
        3. Circuit design
    4. 9.4 Reliability
      1. 9.4.1 Definitions
        1. Mean time between failures
        2. Mean time to failure
        3. Availability
      2. 9.4.2 The cost of reliability
      3. 9.4.3 Design for reliability
        1. Temperature
        2. De-rating
        3. High reliability components
        4. CECC
        5. Stress screening and burn-in
        6. Simplicity
        7. Redundancy
      4. 9.4.4 The value of MTBF figures
      5. 9.4.5 Design faults
        1. The design review
    5. 9.5 Thermal management
      1. 9.5.1 Using thermal resistance
        1. Partitioning the heat path
        2. Transient thermal characteristics of the power device
      2. 9.5.2 Heatsinks
        1. Forced air cooling
        2. Radiation
      3. 9.5.3 Power semiconductor mounting
        1. Heatsink surface preparation
        2. Lead bend
        3. The insulating washer
        4. Mounting hardware
      4. 9.5.4 Placement and layout
  15. Appendix Standards
  16. Bibliography
  17. Index
    1. A
    2. B
    3. C
    4. D
    5. E
    6. F
    7. G
    8. H
    9. I
    10. J
    11. K
    12. L
    13. M
    14. N
    15. O
    16. P
    17. Q
    18. R
    19. S
    20. T
    21. U
    22. V
    23. W
    24. X
    25. Z

Product information

  • Title: The Circuit Designer's Companion, 2nd Edition
  • Author(s): Tim Williams
  • Release date: November 2004
  • Publisher(s): Newnes
  • ISBN: 9780080476513