VoIP Voice and Fax Signal Processing

12.3 CLOCK TIMING DEVIATIONS RELATING TO VoIP PACKETS

This section describes the clock drift and jitter requirements for VoIP voice adapters with foreign exchange subscriber (FXS) interfaces. The summary of this section is that the PCM clock used for interfacing hardware CODEC (ADC, DAC) sampling has to be maintained at better than ±50 PPM and that the clock timing RMS jitter has to be maintained at less than 3-ns RMS. Control of clock drift and jitter on the PCM interface clock can contribute to the improving voice quality, support several fax pages in both pass-through and T.38, and sustain modem calls for several hours. In this chapter, jitter name is used interchangeably for PCM clock jitter and jitter in adaptive and fixed jitter buffers. It is required to interpret it based on the described background text.

FXS is the main interface on most VoIP adapter and residential gateways. Telephone, fax, and modem are connected with this FXS interface. The FXS interface will have hardware devices such as SLIC and CODEC to interface with the processor. CODEC samples the signals at 8 or 16 kHz. The PCM or TDM interface communicates between voice processor and CODEC. The voice processor compresses voice and sends it as raw payload to Real-Time Transport Protocol (RTP). On the receive path, voice payload is taken from jitter buffers and played on hardware CODEC after processing. The PCM clock influences end-to-end packet delivery timing errors. As an example, 80 PCM samples can create ...