Digital Arithmetic

Combinational Implementation 151

3.3

3,3,1

3~

3o4ol

Sequential Implementation

This implementation consists of one adder and a register. To have the cycle time

independent of precision and usually equal to the delay of a few full-adders,

redundant adders are preferred. Using a [p:2] adder each iteration adds p - 2

operands for a total of [m/(p

-

2)] iterations. The algorithm is

s[0] = 0

for/ = 1 to

[m/(p --2)]

do:

S[i] = S[i -

1] +

~-~i(p-2)

l..~j=(i-1)(p-2)+l x(j);

and the result is

S[[m/(p -

2)]]. This result is in carry-save representation. If

the result is required in conventional representation, it is converted ...