Chapter 6

Guard Ring Design and Synthesis

6.1 Guard Ring Design and Integration

Guard ring design and integration is a fundamental design synthesis practice in semiconductor design [1–64]. Guard rings are used in various places in semiconductor chip design to provide electrical isolation of circuit functions. Guard rings are a fundamental part of latchup physics, latchup characterization, and latchup analysis. Guard rings are used to prevent undesirable interaction between devices, circuits, sub-functions, and power domains. The guard ring prevents both current injection and potential perturbations that can lead to parasitic devices, noise, ESD failure, and latchup. In guard ring design, the key issues include the following:

  • Guard ring placement.
  • Guard ring effectiveness.

Guard ring placement addresses where the guard rings are to be placed around a given device, circuit, sub-function, or function. Guard rings are placed wherever concerns of parasitic interaction, noise, ESD, or latchup can occur.

In this chapter, the first section discusses the physics of a guard ring structure, and measurement of its effectiveness. This is followed by a “top-down” design approach instead of a “bottom-up” design method. This chapter will start with a full-chip domain isolation, I/O to I/O, within I/O, within ESD, and eventually within circuit elements. The chapter will then discuss special guard ring structures, such as high-voltage technology [35–42], deep trench [43–48], and through silicon ...

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