October 2017
Intermediate to advanced
586 pages
14h 8m
English
A makefile is a special file used to execute a set of actions, among which the most important is the compilation of programs. There is a dedicated tool to parse makefiles, called make. Prior to jumping to the description of the whole make file, let's introduce the obj-<X> kbuild variable.
In almost every kernel makefile, you will see at least one instance of an obj-<X> variable. This actually corresponds to the obj-<X> pattern, where <X> should be either y, m, left blank, or n. This is used by the kernel makefile from the head of the kernel build system in a general manner. These lines define the files to be built, any special compilation options, and any subdirectories to be entered recursively. A simple example is: ...