October 2017
Intermediate to advanced
586 pages
14h 8m
English
As discussed in Chapter 11, Kernel Memory Management, copies of recently accessed memory areas are stored in the cache. This applies to DMA memory too. The reality is that memory shared between two independent devices is generally the source of cache coherency problems. Cache incoherence is an issue coming from the fact that other devices may not be aware of an update from a writing device. On the other hand, cache coherency ensures that every write operation appears to occur instantaneously, so that all devices sharing the same memory region see exactly the same sequence of changes.
A well-explained coherency issue scenario is illustrated in the following excerpt from LDD3: