Multiple-Port Compliance and Systems Issues
From the perspective of PSE-chip designers, they do not want to provide the ability to classify several ports simultaneously for the following reasons:
1. The voltage sources used during classification are “expensive” in terms of design complexity and silicon area. They should be multiplexed if possible. So from the cost viewpoint, one classification at a time is the best choice.
2. Further, the dissipation during classification can be very high as we have already seen. Several ports being classified simultaneously can lead to a lot of heat generation, which can take the chip into thermal protection and shutdown, depending on its specific architecture, and where exactly the dissipation is occurring. ...