
GENERATING LOGIC STATES 129
of logic devices. This is, of course, particularly true where the digital system
is to be used in a particularly noisy environment (such as a steelworks or
shipyard).
The ability of a logic device to reject noise is measured in terms of its
'noise margin' and is defined as the difference between:
(a) The minimum values of high state output and input voltage.
(b) The maximum values of low state output and input voltage.
Standard 7400 series TTL usually exhibit noise margins of 400 mV while
CMOS offer somewhat superior performance with a noise margin equi-
valent to one third of the positive supply rail voltage, as