
MONOSTABLES AND BISTABLES 137
-+5V
L7405
i-7405
- 7405
2k2
Output
I
From other open-collector logic
Figure 6.18 Wired-NOR
configuration based on open-
collector logic gates
ENABLE A
ENABLE Β
3us line
Figure 6.19 Tri-state logic
configuration
the same output line (bus) should be driven into the high-impedance
state by taking their respective ENABLE inputs to logic 1. Figure
6.19 illustrates this principle.
Where not all of the inputs of a gate are connected or where not all
gates within a package are being used, one is sometimes left wondering
what to do with the unused connections. A TTL input left unconnected
almost invariably 'floats' to th ...