
162 TIMERS
4k7
10η
0
Trigger
input
Figure 7.9 Improving the trigger
sensitivity of
a
555 timer by
reducing quiescent d.c. voltage
present at the trigger input
Figure 7.10 Improving the
trigger sensitivity using an
additional transistor. (Note that
this arrangement triggers on a
positive, rather than negative,
going edge)
pulse. It should be noted that, in common with most timer circuits,
adequate decoupling of the supply rails is essential in order to reduce the
amplitude of supply borne transients. Such decoupling should normally
take the form of an appropriate value capacitor (as a general rule of thumb
this should be at least ten times th ...