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Top-Down Digital VLSI Design
book

Top-Down Digital VLSI Design

by Hubert Kaeslin
December 2014
Intermediate to advanced
598 pages
17h 40m
English
Morgan Kaufmann
Content preview from Top-Down Digital VLSI Design

Index

Symbols

δ delay 
VHDL 209
@ term 
SysVer 250
# term 
SysVer 250, 276
'ifdef 
SysVer 256
1's complement (1'C) 248, 374, 473
2's complement (2'C) 203, 205, 248, 448, 473
7400 family 5

A

Abelian (semi)group 170, 171
abstract, see cell abstract 1
acknowledge line 450
active edge 396, 402, 441, 497
active-low 384, 498
actual responses 308, 341
Ada 191
adaptive computing, see reconfigurable processing unit 63
add-compare-select 156
adder 372, 474
adjacent state assignment 541
adjustable delay line 421
after clause 
VHDL 209, 276
aggregate computation 142
agility 61, 63
algebraic field 170, 171
algebraic structure 170
algebraic transform 116, 142, 155
algorithm 66
algorithm transform  ...
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Publisher Resources

ISBN: 9780128007303