book

Top-Down Digital VLSI Design

Name: Top-Down Digital VLSI Design
Author: Hubert Kaeslin
ISBN: 9780128007723

by Hubert Kaeslin

December 2014

Intermediate to advanced

598 pages

17h 40m

English

Morgan Kaufmann

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Cover image
Title page
Table of Contents
Copyright
Preface
Why this book?HighlightsNotes to instructors
Acknowledgments
Chapter 1: Introduction to Microelectronics
Abstract1.1 Economic impact1.2 Microelectronics viewed from different perspectives1.3 The VLSI design flow1.4 Problems1.5 Appendix I: a brief glossary of logic families1.6 Appendix II: an illustrated glossary of circuit-related terms
Chapter 2: Field-Programmable Logic
Abstract2.1 General idea2.2 Configuration technologies2.3 Organization of hardware resources2.4 Commercial aspects2.5 Extensions of the basic idea2.6 The FPL design flow2.7 Conclusions
Chapter 3: From Algorithms to Architectures
Abstract3.1 The goals of architecture design3.2 The architectural solution space3.3 Dedicated vlsi architectures and how to design them3.4 Equivalence transforms for combinational computations3.5 Options for temporary storage of data3.6 Equivalence transforms for non-recursive computations3.7 Equivalence transforms for recursive computations
3.8 Generalizations of the transform approach
3.9 Conclusions3.10 Problems3.11 Appendix I: A brief glossary of algebraic structures3.12 Appendix II: Area and delay figures of VLSI subfunctions

Chapter 4: Circuit Modeling with Hardware Description Languages
Abstract4.1 Motivation and background4.2 Key concepts and constructs of VHDL4.2.3 A discrete replacement for electrical signals4.2.4 An event-driven scheme of execution4.2.5 Facilities for model parametrization4.2.6 Concepts borrowed from programming languages4.3 Key concepts and constructs of systemverilog
4.3.6 Concepts borrowed from programming languages
4.4 Automatic circuit synthesis from hdl models4.5 Conclusions4.6 Problems4.7 Appendix I: VHDL and systemverilog side by side4.8 Appendix II: VHDL extensions and standards
Chapter 5: Functional Verification
Abstract5.1 Goals of design verification5.2 How to establish valid functional specifications5.3 Preparing effective simulation and test vectors5.4 Consistency and efficiency considerations5.5 Testbench coding and hdl simulation5.6 Conclusions5.7 Problems5.8 Appendix I: Formal approaches to functional verification5.9 Appendix II: Deriving a coherent schedule for simulation and test
Chapter 6: The Case For Synchronous Design
Abstract6.1 Introduction6.2 The grand alternatives for regulating state changes6.3 Why a rigorous approach to clocking is essential in VLSI6.4 The dos and donts of synchronous circuit design6.5 Conclusions6.6 Problems6.7 Appendix: on identifying signals
Chapter 7: Clocking of Synchronous Circuits
Abstract7.1 What is the difficulty with clock distribution?7.2 How much skew and jitter does a circuit tolerate?7.3 How to keep clock skew within tight bounds7.4 How to achieve friendly input/output timing7.5 How to implement clock gating properly7.6 Summary7.7 Problems
Chapter 8: Acquisition of Asynchronous Data
Abstract8.1 Motivation8.2 Data consistency in vectored acquisition8.3 Data consistency in scalar acquisition8.4 Marginal triggering and metastability8.5 Summary8.6 Problems
Appendix A: Elementary Digital Electronics
A.1 IntroductionA.2 Theoretical background of combinational logicA.3 Circuit alternatives for implementing combinational logicA.4 Bistables and other memory circuitsA.5 Transient behavior of logic circuitsA.6 Timing quantitiesA.7 Basic microprocessor input/output transfer protocolsA.8 Summary
Appendix B: Finite State Machines
B.1 Abstract automataB.2 Practical aspects and implementation issuesB.3 Summary
Appendix C: Symbols and Constants
C.1 AbbreviationsC.2 Mathematical symbolsC.3 Physical and material constants
Bibliography
Index

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Top-Down Digital VLSI Design

by Hubert Kaeslin

Become an O’Reilly member and get unlimited access to this title plus top books and audiobooks from O’Reilly and nearly 200 top publishers, thousands of courses curated by job role, 150+ live events each month,
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