December 2011
Intermediate to advanced
436 pages
18h 7m
English
book
Real-Time Digital Signal Processing from MATLAB® to C with the TMS320C6x DSPs, Second Edition, 2nd Edition
by Thad B. Welch, Cameron H.G. Wright, Michael G. Morrow
Content preview from Real-Time Digital Signal Processing from MATLAB® to C with the TMS320C6x DSPs, Second Edition, 2nd Edition
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5.5. PSEUDONOISE SEQUENCES 103
1 r-1
2
r
3
+
mod 2
output
clock
Figure 5.10: An r-stage simple shift register generator with one feedback tap shown.
+
1
23
output
clock
mod 2
Figure 5.11: A 3-stage simple shift register generator with one feedback tap shown.
5.5.1 Theory
The easiest way to introduce PN sequences is in the context of a type of finite state machine
called a shift register. Consider the generalized r-stage shift register generator (SRG), with
feedback, shown in Figure 5.10. Each stage contains (or stores its state as) a 1 or 0, which
we will call a chip.
6
Each time the clock ticks, the contents of stage n moves “to the right” to stage (n +1).
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