
Chapter 11
Project 2: Graphic Equalizer
11.1 Theory
T
HE parallel implementation of a 5-band FIR-based equalizer was first discussed in
Chapter 3. A block diagram of such an equalizer and the generalized extension of
this parallel implementation are shown in Figure 11.1. While this extension to M bands
may not seem like a major change, increasing the computational complexity of the DSP
algorithm by adding additional parallel filters will eventually result in being unable to meet
the real-time schedule. At this stage in the equalizer’s development, we must either settle
for the current level of system performance or rethink our approach to implementing