December 2011
Intermediate to advanced
436 pages
18h 7m
English
book
Real-Time Digital Signal Processing from MATLAB® to C with the TMS320C6x DSPs, Second Edition, 2nd Edition
by Thad B. Welch, Cameron H.G. Wright, Michael G. Morrow
Content preview from Real-Time Digital Signal Processing from MATLAB® to C with the TMS320C6x DSPs, Second Edition, 2nd Edition
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D.2. TMS320C671X ARCHITECTURE 369
Data cache (L1D)
4KB
Program cache (L1P)
4KB
SRAM/L2 cache
64KB
SRAM
192KB
(6713 only)
TMS320C671x
core
EDMA
controller
EMIF
Peripherals
Figure D.7: TMS320C671x memory organization.
scheme. Based on the address of the memory request, the data transfer will be made to
on-chip memory, one of the on-chip peripherals, or to an external memory device using the
external memory interface (EMIF).
The EMIF is designed to provide a glueless interface to a number of different external
memory devices, including various dynamic memories (SDRAM, SBSRAM, etc.) as well
as static memory devices (ROM, SRAM, FIFOs, etc.). The term glueless
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