Digital VLSI Design and Simulation with Verilog

7 Digital Design Using Switches

The switch-level model plays an important role in any prefabrication design and analysis in obtaining the knowledge about the actual number of hardware components and interconnections as well as placing the transistor as per the functionality. In comparison to other levels of abstraction in Verilog models, the switch-level model is quite complex and the circuit is designed at the transistor level. For the design at the switch level, the designer must know about design functionality, hardware components and their interconnections. Doing VLSI design at this level also supports prefabrication fault analysis to obtain the additional hardware design for testing. Since this is the lowest level of abstraction among all other Verilog models, the designer needs knowledge of functional logic block and interconnections. In a switch-level model, the design can be done using switches such as the p-channel metal–oxide–semiconductor field-effect transistor MOSFET(PMOS), n-channel MOSFET (NMOS) and transmission gate (TG) or the Complementary MOSFET (CMOS). This chapter includes digital circuit design at the level of switches using Verilog coding known as the switch-level model.

7.1 Switch-Level Model

Verilog HDL supports the hardware design at the level of transistor from the knowledge of design functionality and interconnections. Such transistor level hardware design can be performed with the help of switches like NMOS, PMOS, CMOS, and TG, etc. [1–2]. The requirement ...