FPGA-based Implementation of Signal Processing Systems

Index

2^nd order IIR filter, 178, 195

Actel^® Antifuse SX FPGA, 106

Actel^® FPGA, 105

adaptive algorithms, 277

adaptive beamformer, 271

adaptive beamforming, 271

adaptive delayed LMS filter, 199

adaptive filtering, 27, 277

adaptive filters, 28

adders, 43

adaptive differential pulse code modulation (ADPCM), 29

as late as possible (ALAP), 172

allocation, 172

adaptive logic module (ALM), 85

Altera FPGAs, 82

Amphion FFT core, 347

architecture, 58

architecture design, 287

architecture development, 282

arithmetic libraries, 301

arithmetic requirements, 61

advanced RISC machine (ARM) microprocessor, 63

as soon as possible (ASAP), 172

application specific integrated circuit (ASIC), 74

Atmel^® AT40K FPGA, 108, 109

Atmel^® FPGAs, 108

balance equations, 246

beamformer, 266, 271

beamformer design, 323

behavioural synthesis, 171

bilinear transform, 24

binding, 172

boundary cell, 303

carry-save adder, 46

carry-save multiplier, 46

cell latency, 306

cell timing, 305, 306

circuit architecture, 58

complex instruction set computer (CISC), 62

configurable logic block (CLB), 95, 96

Clearspeed CSX600 processor, 72

clock networks, 89, 102

clock rate, 144

clock tree, 334

clustering, 251

Connection Machine 2 (CM-2), 69

code generation, 253

complex multiplication, 303

computational complexity, 59

control of QR architecture, 314

control wrapper, 260

COordinate Rotation Digital Computer (CORDIC), 38, 342

correlation, 23

critical loop, 186

cyclo-static dataflow (CSDF), 246

cut-set theorem, 154

cyclo-static dataflow, ...