
Interrupts
of this ISR the instruction must be included that clears
the mask flag (CLI in 6502 code), otherwise all subse-
quent calls on the INT line will be locked out for
evermore! The ISR for B, on the other hand, must not
include these instructions since it is required to allow A
to interrupt if necessary. The problem is that there will
be nothing to prevent C from taking over from B either!
Obviously such simple systems have their limitations.
One solution would be to connect peripheral A to the
NMI line, giving it the highest possible priority, and B
and C to the INT line with the routine for B written such
that it can mask out C.
Dais ...