JTAG
The DSP56805 has a JTAG port to aid system debugging. A JTAG port consists of four dedicated signals (Table 19-1).
Table 19-12. JTAG signals
|
Signal name |
Function |
|---|---|
|
TDI |
Test data input |
|
TDO |
Test data output |
|
TMS |
Test mode select |
|
TCK |
Test clock |
Freescale Semiconductor adds additional signals to the standard JTAG set. Specifically, it adds
(Test Reset) to reset the JTAG state machine and
(Debug Event), which is equivalent to an interrupt output, indicating that an event (such as a breakpoint) has happened in the
OnCE
(
On-Chip Emulation
) module.
JTAG is principally intended for debugging purposes, but since it gives you complete control of the processor's internals, it can also be used for reprogramming the internal program flash. The Freescale Semiconductor application note (AN1935/D) Programming On-Chip Flash Memories of DSP56F80x DSPs Using the JTAG/OnCE Interface, available from the Freescale Semiconductor web site, contains full details on the process involved, as well as sample source code and examples.
The Freescale Semiconductor Software Development Kit, based on the CodeWarrior C compiler, for the DSP56800 series provides both software and hardware tools for programming these processors.
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