Why does it take longer to design SOCs compared to traditional ASICs? To answer this question, we must examine factors influencing the degree of difficulty and Turn Around Time (TAT) for designing ASICs and SOCs. Usually for an ASIC, the following factors influence TAT:
Frequency of the design
Number of clock domains
Number of gates
Number of blocks
Another factor that influences TAT for SOCs is system integration (mainly integrating different silicon IPs on the same IC) that is one of the key factors in TAT. In a typical SOC, you deal with complex data flows and multiple cores such as CPUs, DSPs, DMA, and peripherals. Therefore, resource sharing becomes an issue. Figure 1.5 shows a bus-based approach to integration. ...