Green Electronics Manufacturing

307

14

Let’s Package a Lead-Free Electronic Design

In ip-chip packaging, the mismatch of thermal expansion coefcients

among the silicon die, copper heat spreader, and packaging substrate

induces a concentrated stress eld around the edges and corners of

the silicon die during assembly, testing, and service. The concentrated

stresses result in delamination on various interfaces involving a range of

length scales from hundreds of nanometers to millimeters. Among these

failures, underll delamination is a dominant failure mode.

Lead-free solder materials are emerging to replace tin-lead solders in elec-

tronic assemblies as the industry adapts to ...