One useful division that computer architects often employ when talking about CPUs is that of front end versus back end. As you already know, when instructions are fetched from main memory, they must be decoded for execution. This fetching and decoding takes place in the processor’s front end.
You can see in Figure 3-1 that the front end roughly corresponds to the control and I/O units in the previous chapter’s diagram of the DLW-1’s programming model. The ALU and registers constitute the back end of the DLW-1. Instructions make their way from the front end down through the back end, where the work of number crunching gets done.
Figure 3-1. Front end versus back end
We can now modify Figure 1-4 to show all four phases of execution ...