Branch Prediction
Because of the depth of its pipeline and the width of its back end, the 970’s designers spent a sizable chunk of the chip’s resources on branch prediction. Like a high-hit-rate instruction cache, accurate branch prediction is essential if the 970 is to keep its pipeline full and its extensive execution resources in constant use. As such, the 970’s extremely robust branch prediction unit (BPU) is one of its greatest strengths. This section takes a closer look at the top half of the 970’s front end and at the role that branch prediction plays in steering that front end through the instruction stream.
The 970’s instruction fetch logic fetches up to eight instructions per cycle from the L1 I-cache into an instruction queue, and on ...
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