Automatic Synthesis and Verification of Real-Time Embedded Software
■
415
16.5 Conclusions and Future Work
An object-oriented component-based application framework, called VERTAF, was proposed for
the development of real-time embedded system applications with mobile and ubiquitous control
access. It was a result of the integration of three different technologies: software component reuse,
formal synthesis, and formal verification. Starting from user-specified UML models, automation
was provided in model transformations, scheduling, verification, and code generation. VERTAF
can be easily extended since new specification languages, scheduling algorithms, etc., can easily be
integrated into it.
Future extensions will include support for share-driven scheduling ...