PCI Express System Architecture

Tables

1 PC Architecture Book Series

1-1 Bus Specifications and Release Dates

1-2 Comparison of Bus Frequency, Bandwidth and Number of Slots

1-3 PCI Express Aggregate Throughput for Various Link Widths

2-1 PCI Express Non-Posted and Posted Transactions

2-2 PCI Express TLP Packet Types

2-3 PCI Express Aggregate Throughput for Various Link Widths

3-1 Ordered Set Types

3-2 Data Link Layer Packet (DLLP) Types

3-3 PCI Express Address Space And Transaction Types

3-4 PCI Express Posted and Non-Posted Transactions

3-5 PCI Express TLP Variants And Routing Options

3-6 TLP Header Type and Format Field Encodings

3-7 Message Request Header Type Field Usage

3-8 Results Of Reading The BAR after Writing All “1s” To It

3-9 Results Of Reading The BAR Pair after Writing All “1s” ...