4.5. Virtual Simple Architecture (VISA): Integrating Nondeterminism Without Undermining Safety
In the previous section, we showed how general-purpose embedded processors are evolving as the demand for performance grows. We also highlighted the tension between higher performance and the need for deterministic performance, in hard real-time systems. In this section, we frame this issue in terms of static worst-case timing analysis and describe how dual tracks for open and closed embedded systems can be bridged with a new microarchitecture substrate that combines deterministic and non-deterministic performance.
Worst-case execution times (WCETs) of hard real-time tasks are needed for safe planning and ensuring that the processor is never over-subscribed ...
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