February 2003
Intermediate to advanced
592 pages
11h 47m
English
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Chapter 4. Packet Protocol
The Previous Chapter
The previous chapter described the function of each signal in the high and low speed HyperTransport signal groups. The CAD, CTL, and CLK high speed signals are routed point-to-point as low-voltage differential pairs between two devices (or between a device and a connector in some cases). The RESET#, PWROK, LDTREQ#, and LDTSTOP# low speed signals are single-ended low voltage CMOS and may be bused to multiple devices. In addition, each device requires power supply and ground pins. Because the CAD bus width is scalable, the actual number of CAD and CLK signal pairs varies, as does the number of power and ground pins to the device.
This Chapter
This chapter describes the use of HyperTransport control ...
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