HyperTransport™ System Architecture

Background and Introduction

First, a brief review of the essential elements of the high-speed link is provided including an introduction to the primary aspects of the electrical signaling environment.

Each link consists of two sets of uni-directional signals (see Figure 14-1) that support concurrent data transfers in each direction. HT achieves high performance by transferring data at a maximum clock frequency of 800MHz, coupled with the use source synchronous double data rate (DDR) clocking techniques. DDR clocking permits data transfer on both the rising and falling edges of each clock. HT also relies on low voltage swing differential signaling with on-die differential termination to facilitate the high-speed data rates and to improve noise ...