Example 2: Non-Posted WrSized (Dword) Transaction
Problem: Device 2 (UnitID2) in Figure 7-4 on page 150 targets main memory with a non-posted, isochronous, sized (dword) write of two dwords.
Figure 7-4. DMA Non-Posted Write Targeting Main Memory
Example 2: WrSized (Dword) Request Packet Setup
(Refer to [1] in Figure 7-4 on page 150)
Command[5:0] Field (Byte 0, Bit 5:0)
This is the sized write (WrSized) command code. There are several option bits within this field (see underlined bits below). Assume dword (bit 2) and Isoc bits (bit 1) are enabled; the posted (bit 5) and coherency (bit 0) bits are disabled (cleared = 0). This indicates an isochronous, ...
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