HyperTransport™ System Architecture

Background

Over the years, power management control has migrated to the operating system in many platforms. System and I/O devices designers provide registers for the OS to control power at the function, device, bus, and system levels.

• Hardware registers for power management reside in chipsets and IO devices (e.g. PCI).

• Transitions in power state typically occur under software control as chipset hardware detects inactivity time-outs and interrupts the processor, which in turn executes the power management routines.

Some buses, such as PCI, define power management registers for each function that can be programmed to cause changes in power states and to enable wakeup, if supported (e.g. modem wake-up). Other buses like the ISA bus appeared before ...