book

Juniper MX Series

by Douglas Richard Hanks Jr., Harry Reynolds

October 2012

Intermediate to advanced

902 pages

28h 9m

English

O'Reilly Media, Inc.

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Proof of Concept Laboratory
Interface NamesAggregate Ethernet AssignmentsLayer 2IPv4 AddressingIPv6 Addressing

One JunosSoftware ReleasesThree Release CadenceSoftware ArchitectureDaemonsManagement DaemonRouting Protocol DaemonDevice Control DaemonChassis Daemon (and Friends)Routing Sockets
MX80MX80 Interface NumberingMX80-48T Interface NumberingMidrangeMX240Interface NumberingFull RedundancyNo RedundancyMX480Interface NumberingMX960Interface NumberingFull RedundancyNo Redundancy
Trio ArchitectureBuffering BlockLookup BlockInterfaces BlockDense Queuing Block
Dense Port ConcentratorModular Port ConcentratorMPC1MPC2MPC-3D-16X10GE-SFPPMPC3EMultiple Lookup Block ArchitectureSource MAC LearningDestination MAC LearningPolicingPacket WalkthroughMPC1 and MPC2 with Enhanced QueuingMPC3EModular Interface CardNetwork Services
Ethernet SwitchSwitch FabricMX240 and MX480 Fabric PlanesMX960 Fabric PlanesJ-CellJ-Cell FormatJ-Cell FlowRequest and GrantMX Switch Control BoardMX SCB and MPC CaveatsMX240 and MX480MX960Enhanced MX Switch Control BoardMX240 and MX480MX960
ArchitectureSwitch Fabric BoardPower SupplyAir FlowLine Card Compatibility
Ethernet IIIEEE 802.1QIEEE 802.1QinQ
Basic Comparison of Service Provider versus Enterprise StyleService Provider StyleEnterprise Style
TaggingVLAN Taggingvlan-id-rangeStacked VLAN TaggingFlexible VLAN TaggingEncapsulationEthernet BridgeExtended VLAN BridgeFlexible Ethernet ServicesService Provider Bridge Domain Configuration
Interface ModeAccessTrunkIEEE 802.1QinQIEEE 802.1Q and 802.1QinQ CombinedVLAN Rewrite
Stack Data StructureStack OperationsStack Operations Mapinput-vlan-mapoutput-vlan-mapTag CountBridge Domain RequirementsExample: Push and PopExample: Swap-Push and Pop-Swap
Learning DomainSingle Learning DomainMultiple Learning DomainsBridge Domain ModesDefaultNoneAllListSingleDualBridge Domain OptionsMAC Table SizeGlobalBridge domainInterfaceNo MAC learningShow Bridge Domain Commandsshow bridge domainshow bridge mac-tableshow bridge statisticsshow l2-learning instance detailClear MAC AddressesSpecific MAC AddressEntire Bridge-DomainMAC Accounting
IRB Attributes
Configuration
Stateless versus StatefulStatelessStatefulStateless Filter ComponentsStateless Filter TypesProtocol FamiliesFilter TermsThe Implicit Deny-All TermFilter MatchingA Word on Bit Field MatchingFilter ActionsFilters versus Routing PolicyFilter ScalingFilter Optimization TipsFiltering Differences for MPC versus DPCEnhanced Filter Mode
Stateless Filter ProcessingFilter ActionsTerminating ActionsNonterminating ActionsFlow Control Actions
Rate Limiting: Shaping or Policing?ShapingThe Leaky Bucket AlgorithmThe Token Bucket AlgorithmPolicingJunos Policer OperationPolicer ParametersA Suggested Burst SizePolicer ActionsBasic Policer ExampleBandwidth PolicerLogical Bandwidth PolicerCascaded PolicersSingle and Two-Rate Three-Color PolicersTCM Traffic ParametersSingle-Rate Traffic ParametersTwo-Rate Traffic ParametersColor Modes for Three-Color PolicersConfigure Single-Rate Three-Color PolicerssrTCM NonconformanceConfigure Two-Rate Three-Color PolicerstrTCM NonconformanceHierarchical PolicersHierarchical Policer Example
Filter Application PointsLoopback Filters and RE ProtectionInput Interface FiltersOutput Interface FiltersAggregate or Interface SpecificFilter ChainingFilter NestingForwarding Table FiltersGeneral Filter RestrictionsApplying PolicersLogical Interface PolicersFilter-Evoked Logical Interface PolicersPhysical Interface PolicersPolicer Application Restrictions
Filter Processing in Bridged and Routed EnvironmentsMonitor and Troubleshoot Filters and PolicersMonitor System Log for ErrorsBridge Family Filter and Policing Case StudyPolicer DefinitionHTTP Filter DefinitionFlood FilterVerify Proper OperationSummary
IPv4 RE Protection FilterIPv6 RE Protection FilterNext-Header Nesting, the Bane of Stateless FiltersThe Sample IPv6 Filter
The Issue of Control Plane DepletionDDoS Operational OverviewHost-Bound Traffic ClassificationA Gauntlet of PolicersConfiguration and Operational VerificationDisabling and TracingConfigure Protocol Group PropertiesVerify DDoS OperationLate Breaking DDoS Updates
The Attack Has Begun!Analyze the Nature of the DDoS Threat
BGP Flow-Specification to the RescueConfigure Local Flow-Spec RoutesFlow-Spec Algorithm VersionValidating Flow RoutesLimit Flow-Spec Resource UsageSummary
Let the Attack Begin!Determine Attack Details and Define Flow RouteSummary
Port versus Hierarchical Queuing MPCsH-CoS and the MX80CoS Capabilities and ScaleQueue and Scheduler ScalingHow Many Queues per Port?Configure Four- or Eight-Queue ModeLow Queue WarningsTrio versus I-Chip/ADPC CoS Differences
Intelligent OversubscriptionThe Remaining CoS Packet FlowCoS Processing: Port- and Queue-Based MPCsSwitch Fabric PriorityClassification and PolicingClassification and Rewrite on IRB InterfacesEgress ProcessingEgress Queuing: Port or Dense Capable?WREDTrio Hashing and Load BalancingA Forwarding Table Per-Packet Policy Is NeededLoad Balancing and SymmetryKey Aspects of the Trio CoS ModelIndependent Guaranteed Bandwidth and WeightGuaranteed versus Excess Bandwidth and Priority HandlingInput Queuing on TrioTrio BufferingTrio Drop ProfilesTrio Bandwidth AccountingTrio Shaping GranularityTrio MPLS EXP Classification and Rewrite DefaultsTrio CoS Processing Summary
The H-CoS Reference ModelLevel 4: QueuesExplicit Configuration of Queue Priority and RatesLevel 3: IFLThe Guaranteed RatePriority Demotion and PromotionG-Rate Based Priority Handling at NodesPer Priority Shaping–Based Demotion at NodesQueue-Level Priority DemotionLevel 2: IFL-SetsRemaining Traffic ProfilesForcing a Two-Level Scheduling HierarchyLevel 1: IFDRemainingRemaining ExampleInterface Modes and Excess Bandwidth SharingPIR CharacteristicsPIR/CIR CharacteristicsShaper Burst SizesCalculating the Default Burst SizeChoosing the Actual Burst SizeBurst Size ExampleShapers and Delay BuffersDelay Buffer Rate and the H-CoS HierarchySharing Excess BandwidthScheduler NodesQueuesExcess NoneExcess Handling DefaultsExcess Rate and PIR Interface ModeExcess Sharing ExamplePriority-Based ShapingFabric CoSControl CoS on Host-Generated TrafficDefault Routing Engine CoSDynamic Profile OverviewDynamic Profile LinkingDynamic CoSH-CoS Summary
Scheduling DisciplineScheduler Priority LevelsScheduler to Hardware Priority MappingPriority PropagationPriority Promotion and DemotionScheduler ModesPort-Level QueuingOperation Verification: Port LevelPer Unit SchedulerHierarchical SchedulerH-CoS and Aggregated Ethernet InterfacesAggregated Ethernet H-CoS ModesSchedulers, Scheduler Maps, and TCPsScheduler MapsConfigure WRED Drop ProfilesScheduler Feature SupportTraffic Control ProfilesOverhead Accounting on TrioTrio Scheduling and Priority Summary
Four Forwarding Classes, but Only Two QueuesDefault BA and Rewrite Marker TemplatesMX Trio CoS Defaults Summary
Where to Start?Trio CoS Proof-of-Concept Test LabA Word on RatiosExample 1: PIR ModeExample 2: CIR/PIR ModeExample 3: Make a Small, “Wafer-thin” Configuration ChangePredicting Queue Throughput Summary
Configure Unidirectional CoSEstablish a CoS BaselineBaseline ConfigurationThe Scheduler BlockSelect a Scheduling ModeApply Schedulers and ShapingVerify Unidirectional CoSConfirm Queuing and ClassificationUse Ping to Test MF ClassificationConfirm Scheduling DetailsCheck for Any Log ErrorsConfirm Scheduling BehaviorMatch Tester’s Layer 2 Rate to Trio Layer 1 ShapingCompute Queue Throughput: L3The Layer 3 IFL Calculation: MaximumThe Layer 3 IFL Calculation: Actual Throughput
Configure H-CoSVerify H-CoSVerify H-CoS in the Data PlaneTrio CoS Summary
MX-VC TerminologyMX-VC Use CaseMX-VC RequirementsMX-VC ArchitectureMX-VC Kernel SynchronizationMX-VC Routing Engine FailuresVC-Mm failureVC-Mb failureVC-Bm failureVC-Bb failureVC-Lm failureVC-LbMX-VC Interface NumberingMX-VC Packet WalkthroughVirtual Chassis TopologyMastership ElectionSummary
Chassis Serial NumberMember IDR1 VCP InterfaceRouting Engine GroupsVirtual Chassis ConfigurationGRES and NSRR2 VCP InterfaceVirtual Chassis VerificationVirtual Chassis TopologyRevert to StandaloneSummary
VCP Traffic EncapsulationVCP Class of Service WalkthroughForwarding ClassesSchedulersClassifiersRewrite RulesFinal ConfigurationVerification
J-Flow EvolutionInline IPFIX PerformanceInline IPFIX ConfigurationChassis ConfigurationFlow MonitoringSampling InstanceFirewall FilterInline IPFIX VerificationIPFIX Summary
Types of NATServices Inline InterfaceService SetsNext-Hop Style Service SetsInterface Style Service SetsTraffic DirectionsNext-Hop Style Traffic DirectionsInterface Style Traffic DirectionsDestination NAT ConfigurationNetwork Address Translation Summary
Enabling Tunnel ServicesTunnel Services Case StudyTunnel Services Case Study Final VerificationTunnel Services Summary
Port Mirror Case StudyConfigurationPort Mirror Summary
MC-LAG State OverviewMC-LAG Active-StandbyMC-LAG Active-ActiveMC-LAG State SummaryMC-LAG Family SupportMulti-Chassis Link Aggregation versus MX Virtual-ChassisMC-LAG Summary
ICCP HierarchyICCP Topology GuidelinesHow to Configure ICCPICCP Configuration GuidelinesValid ConfigurationsInvalid ConfigurationsICCP Split BrainICCP Summary
Active-StandbyActive-ActiveICL ConfigurationMAC Address SynchronizationMC-LAG Modes Summary
Logical Interfaces and Loopback AddressingLayer 2Loop PreventionInput FeatureOutput FeatureLoop Prevention VerificationR1 and R2Bridging and IEEE 802.1QIEEE 802.3adS1 and S2Bridging and IEEE 802.1QIEEE 802.3adLayer 3Interior Gateway Protocol—IS-ISBidirectional Forwarding DetectionVirtual Router Redundancy ProtocolMC-LAG ConfigurationICCPR1 and R2R3 and R4ICCP VerificationMulti-Chassis Aggregated Ethernet InterfacesR1 and R2R3 and R4Connectivity VerificationIntradata Center VerificationInterdata Center VerificationCase Study Summary
The GRES ProcessSynchronizationRouting Engine SwitchoverWhat Can I Expect after a GRES?Configure GRESGRES OptionsDisk FailProcess Failure Induced SwitchoversVerify GRES OperationGRES, Before and AfterGRES and Software Upgrade/DowngradesGRES Summary
GR ShortcomingsGraceful Restart Operation: OSPFRestarting RouterGrace LSAHelper RouterAborting GRA Graceful Restart, at LastA Fly in the Ointment—And an Improved GR for OSPFOSPF Restart Signaling RFCs 4811, 4812, and 4813Graceful Restart and other Routing ProtocolsJunos GR Support by ReleaseConfigure and Verify OSPF GREnable Graceful-Restart GloballyOSPF GR OptionsVerify OSPF GRAn Ungraceful RestartA Graceful RestartGraceful Restart Summary
Replication, the Magic That Keeps Protocols RunningNonstop BridgingNSB Only Replicates Layer 2 StateNSB and Other Layer 2 FunctionsCurrent NSR/NSB SupportBFD and NSR/GRES SupportBFD Scaling with NSRBFD and GR—They Don’t Play Well TogetherNSR and BGPNSR and PIMPIM Supported FeaturesPIM Unsupported FeaturesPIM Incompatible FeaturesNSR and RSVP-TE LSPsNSR and VRRPThis NSR Thing Sounds Cool; So What Can Go Wrong?NSR, the good . . .. . . And the badPracticing Safe NSRsThe Preferred Way to Induce SwitchoversOther Switchover MethodsTips for a Hitless (and Happy) SwitchoverConfigure NSR and NSBNSR and Graceful Restart: Not like Peanut Butter and ChocolateGeneral NSR Debugging TipsVerify NSR and NSBConfirm Pre-NSR Protocol StateConfirm Pre-NSR Replication StateBGP ReplicationIS-IS ReplicationConfirm BFD ReplicationLayer 2 NSB VerificationPerform a NSRTroubleshoot a NSR/NSB ProblemNSR Summary
ISSU OperationISSU Dark WindowsBFD and the Dark WindowISSU Layer 3 Protocol SupportISSU Layer 2 SupportMX MIC/MPC ISSU SupportISSU: A Double-Edged KnifeISSU RestrictionsISSU Troubleshooting TipsISSU Summary
Verify ISSU ReadinessPerform an ISSUConfirm ISSUSummary

Overview

Discover why routers in the Juniper MX Series, with their advanced feature sets and record breaking scale, are so popular among enterprises and network service providers. This authoritative book shows you step-by-step how to implement high-density, high-speed Layer 2 and Layer 3 Ethernet services, using Router Engine DDoS Protection, Multi-chassis LAG, Inline NAT, IPFIX/J-Flow, and many other Juniper MX features.