Digital Circuits & Design, 1st Education by Pearson

Logic Circuit Design: Data Processing | 6.49

S

0

S

1

I

E

O

0

= ES

1

S

0

I

O

1

= ES

1

S

0

I

O

2

= ES

1

S

0

I

O

3

= ES

1

S

0

I

FIGURE 6.53 | One-to-four lines DeMux

O

0

E

O

1

O

2

O

3

I

S

0

S

1

1 to 4

DeMUX

FIGURE 6.54 | Block diagram of

1-to-4 lines DeMux

6.5.3 | One-to-Eight Line Demultiplexer

A one-to-eight (or 1-to-2

3

i.e. 1-to-8) line demultiplexer (DeMUX) is a combinational circuit

with one input line, I eight output lines, O

0

, O

1

, O

2

, O

3

, O

4

, O

5

, O

6

and O

7

and three selection

lines, S

2

, S

1

and S

0

. On receiving active low enable input, demultiplexer is able to perform

its intended function. A 1-to-2

3

line demultiplexer places binary information available on

input line, I, on any ...