Hands-On RTOS with Microcontrollers

Inter-core communication

Information sharing between the cores is possible, but is subject to the same concurrent-access considerations that any other multi-threaded environment has, which is why mailbox hardware is typically included onchip. This hardware is dedicated to facilitating communication between the two cores. Mailboxes will generally have the following features:

• Hardware mutex functionality: Used to protect RAM shared between the two cores. The idea is identical to mutexes in a pure software environment—they are used to provide mutually exclusive access to a shared resource.
• Interrupts to/from each core: These interrupts can be raised by a core after writing data to a shared area of memory, alerting the other core that a message/data ...