
Switched-Capacitor Building Blocks
59
In the schematic, A
1
is the input voltage buffer that prevents the input from being
affected by the switching transient due to the switched-capacitor (i.e., M
1
and C
h
)
operations, and A
2
is the output voltage buffer that protects the voltage held by C
h
from being corrupted by the transient in the subsequent circuit during the holding
mode.
The operation of the S&H circuit is described as follows: During the sampling
mode, the sampling switch M
1
is turned on, and the input voltage V
in
is sampled onto
C
h
. During the holding mode, the sampling switch is turned off such that the connec-
tion between the hold ca ...