
Demystifying Switched-Capacitor Circuits
62
Distortion may stem from an imperfect clock signal whose waveform has a fi nite
slope. As we know, the sampling switch M
1
in Figure 3.5 is made of an NMOS
transistor; thus, when the value of (V
clk
− V
in1
) reaches the transistor’s threshold
voltage V
th
, the switch is turned on. If the transition of V
clk
from “high” to “low” (and
vice versa) is not steep—that is, the waveform of V
clk
changes with a fi nite slope,
then neither the value of (V
clk
− V
in1
) nor the switch open/close operation changes
abruptly, and thereby the actual sampling or holding instant deviates from the ideal.
As intuition suggests, the ...