June 2006
Intermediate to advanced
336 pages
10h 24m
English
Content preview from Demystifying Switched Capacitor Circuits
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Demystifying Switched-Capacitor Circuits
74
few circuit techniques have been reported to alleviate S&H effects on high-speed
interpolations [56][57][58]. The interested reader is referred to the literature for more
details.
SC Decimators
As an analog sampled-data signal processing stage with an operation complementary
to that of the SC interpolator, the SC decimator reduces the sampling rate from Mf
clk
to f
clk
, where M is an integer greater than 1 and is often called decimation factor. In
contrast to its interpolating counterpart, the SC decimator is usually used as the input
stage of an SC fi lter, allowing the SC fi lter to operate at a lower c ...
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