May 2024
Intermediate to advanced
665 pages
23h 2m
English
book
The X86 Microprocessors: Architecture and Programming (8086 to Pentium), 1st Edition
by Lyla B. Das
Content preview from The X86 Microprocessors: Architecture and Programming (8086 to Pentium), 1st Edition
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424 THE x86 MICROPROCESSORS
A19
A16
AEN
ADSTB
DB7
DB0
A7
A0
LAT-4
LAT-8
G
7
4
3
7
3
7
4
3
7
3
OE
OE
A16–A19
G
A8–A15
A0–A7
8
2
3
7
A
D
D
R
E
S
S
B
U
S
A0
to
A19
Figure 11.23 | Address generation for DMA operation
8 bits of the address available with it. ese data lines are fed to the input of an 8-bit
latch (See Fig 11.23) which is clocked by the ADSTB (Address Strobe) signal. us at the
output of this 8-bit latch, the upper 8 bits of the 16-bit address is available and it can then
be removed from the data lines of the 8237 chip.
During DMA operation, the address on the address bus goes on incrementing. e lowest iii)
8 bits increments from 00 to FFH and then has to overfl ow to ...
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