index
4004, 1
64-bit, 3
data bus, 2–3, 6–7, 9–10, 32,
42–45
8008, 1–2
80186,
487–88, 492–96, 501
80188, 487
80286, 2–4, 503–05, 514, 518, 524,
540
80386 SX, 504
80386, 503–05, 507–08, 510–16,
524–28, 530–31, 535, 538–42
enhancements, 503–06, 513
hardware features, 505, 510, 528,
535
internal architecture, 505
interrupts of, 538
privilege levels of, 530
programming enhancements, 503,
506
real mode operations, 513
80486, 3–4, 6, 545–46, 548–49, 552,
555
enhanced features of, 545
8080, 1–2
8085 microprocessor, 1, 31
clock, 1, 5–6, 8–9, 12, 31, 42–4
hardware aspects of, 41
power supply, 43
programming model, 1, 31–2
read and write, 8, 43
reset and ready pins, 43
8086, 51–5, 58, 60–1, 63
in a coprocessor confi guration, 455,
458, 461
internal block diagram of, 51–3
register ...