The X86 Microprocessors: Architecture and Programming (8086 to Pentium), 1st Edition

548 THE x86 MICROPROCESSORS

and a parity bit is provided for each byte of memory.  e parity check bits appear on pins

DP0–DP3, which are parity inputs as well as parity outputs.  ese are typically stored

in memory during each write cycle and read from memory during each read cycle. On a

read, the microprocessor checks parity and generates a parity check error, if it occurs on

the PCHK pin. A parity error causes no change in processing unless the user applies the

PCHK signal to an interrupt input. Figure 16.4 shows the memory banks of 80486 with the

bank enable signals (BE s) and the parity check bit for each channel.

Another enhancement which ...