May 2024
Intermediate to advanced
665 pages
23h 2m
English
book
The X86 Microprocessors: Architecture and Programming (8086 to Pentium), 1st Edition
by Lyla B. Das
Content preview from The X86 Microprocessors: Architecture and Programming (8086 to Pentium), 1st Edition
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THE PENTIUM PROCESSOR 549
width was 16 bits. However, for ’386 onwards the bus width is 32 bits and data is divided into
4 memory banks. For Pentium, the external data bus width is 64 bits. In all these cases, a bus
penalty will occur if the memory address is not ‘aligned’. A performance penalty occurs due to
misaligned data. What is meant by data alignment?
2-byte Data A 16-bit data item is aligned if it is stored at an address that is a multiple of two.
is implies that the least signifi cant bit of the address must be 0. is is the case that we have
discussed for the 8086, where the LSB of the address being 0, means that the address is an even
number.
4-byte Date Let us think of it this way – if all the 4 bytes are in one row, they can ...
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